build ok, issue with display
This commit is contained in:
aanper
parent
7c03ce179c
commit
568143537d
@ -87,8 +87,8 @@ endif
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APP_CC1101 ?= 0
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APP_CC1101 ?= 0
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ifeq ($(APP_CC1101), 1)
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ifeq ($(APP_CC1101), 1)
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CFLAGS += -DAPP_CC1101
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CFLAGS += -DAPP_CC1101
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CPP_SOURCES += $(APP_DIR)/cc1101-workaround/cc1101-workaround.cpp
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C_SOURCES += $(wildcard $(APP_DIR)/cc1101-workaround/*.c)
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CPP_SOURCES += $(APP_DIR)/cc1101-workaround/cc1101.cpp
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CPP_SOURCES += $(wildcard $(APP_DIR)/cc1101-workaround/*.cpp)
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APP_INPUT = 1
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APP_INPUT = 1
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APP_DISPLAY = 1
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APP_DISPLAY = 1
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endif
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endif
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@ -200,12 +200,12 @@ extern "C" void cc1101_workaround(void* p) {
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widget_draw_callback_set(widget, render_callback, NULL);
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widget_draw_callback_set(widget, render_callback, NULL);
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// Open GUI and register widget
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// Open GUI and register widget
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GuiApi* gui = furi_open("gui");
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GuiApi* gui = (GuiApi*)furi_open("gui");
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if(gui == NULL) {
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if(gui == NULL) {
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printf("gui is not available\n");
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printf("gui is not available\n");
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furiac_exit(NULL);
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furiac_exit(NULL);
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}
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}
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gui->add_widget(gui, state.widget, WidgetLayerFullscreen);
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gui->add_widget(gui, widget, WidgetLayerFullscreen);
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printf("[cc1101] creating device\n");
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printf("[cc1101] creating device\n");
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@ -253,7 +253,7 @@ extern "C" void cc1101_workaround(void* p) {
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highRSSI[activeBand]
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highRSSI[activeBand]
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);
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);
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/*
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*
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if(jamm_on) {
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if(jamm_on) {
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jamming(&cc1101, activeBand, activeChannel, 500);
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jamming(&cc1101, activeBand, activeChannel, 500);
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} else {
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} else {
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396
applications/cc1101-workaround/cc1101.cpp
Normal file
396
applications/cc1101-workaround/cc1101.cpp
Normal file
@ -0,0 +1,396 @@
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#include "flipper_v2.h"
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#include "cc1101-workaround/cc1101.h"
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// ******************************************************************************
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#define WRITE_BURST 0x40
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#define READ_SINGLE 0x80
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#define READ_BURST 0xC0
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#define BYTES_IN_FIFO 0x7F //used to detect FIFO underflow or overflow
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/*********************ss_pin as global variable****************************** */
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/* cc1101 */
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/******************************************************************************/
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GpioPin ss_pin;
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CC1101::CC1101(GpioPin ss_pin) {
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/*
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pinMode(gdo0_pin, OUTPUT); //GDO0 as asynchronous serial mode input
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pinMode(gdo2_pin, INPUT); //GDO2 as asynchronous serial mode output
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*/
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pinMode(ss_pin, OUTPUT);
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this->ss_pin = ss_pin;
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}
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//******************************************************************************
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//SpiInit
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/******************************************************************************/
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void CC1101::SpiInit(void) {
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//initialize spi pins
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//Enable spi master, MSB, SPI mode 0, FOSC/4
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SpiMode(0);
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}
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void CC1101::SpiEnd(void) {
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/*
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SPCR = ((0<<SPE) | // SPI Enable
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(0<<SPIE)| // SPI Interupt Enable
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(0<<DORD)| // Data Order (0:MSB first / 1:LSB first)
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(1<<MSTR)| // Master/Slave select
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(0<<SPR1)|(0<<SPR0)| // SPI Clock Rate ( 0 0 = osc/4; 0 1 = osc/16; 1 0 = osc/64; 1 1= 0sc/128)
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(0<<CPOL)| // Clock Polarity (0:SCK low / 1:SCK hi when idle)
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(0<<CPHA)); // Clock Phase (0:leading / 1:trailing edge sampling)
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//SPSR = (0<<SPI2X); // Double Clock Rate
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*/
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}
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/******************************************************************************
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Function: SpiMode
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*INPUT : config mode
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(0<<CPOL) | (0 << CPHA) 0
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(0<<CPOL) | (1 << CPHA) 1
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(1<<CPOL) | (0 << CPHA) 2
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(1<<CPOL) | (1 << CPHA) 3
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*OUTPUT :none
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******************************************************************************/
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void CC1101::SpiMode(byte config) {
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/*
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byte tmp;
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// enable SPI master with configuration byte specified
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SPCR = 0;
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SPCR = (config & 0x7F) | (1<<SPE) | (1<<MSTR);
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tmp = SPSR;
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tmp = SPDR;
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*/
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}
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/****************************************************************
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*FUNCTION NAME:SpiTransfer
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*FUNCTION :spi transfer
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*INPUT :value: data to send
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*OUTPUT :data to receive
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****************************************************************/
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extern SPI_HandleTypeDef hspi3;
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byte CC1101::SpiTransfer(byte value) {
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uint8_t buf[1] = {value};
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uint8_t rxbuf[1] = {0};
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HAL_SPI_TransmitReceive(&hspi3, buf, rxbuf, 1, HAL_MAX_DELAY);
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return rxbuf[0];
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}
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/****************************************************************
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*FUNCTION NAME:SpiWriteReg
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*FUNCTION :CC1101 write data to register
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*INPUT :addr: register address; value: register value
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*OUTPUT :none
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****************************************************************/
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void CC1101::SpiWriteReg(byte addr, byte value) {
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(addr);
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SpiTransfer(value);
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digitalWrite(ss_pin, HIGH);
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}
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/****************************************************************
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*FUNCTION NAME:SpiWriteBurstReg
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*FUNCTION :CC1101 write burst data to register
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*INPUT :addr: register address; buffer:register value array; num:number to write
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*OUTPUT :none
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****************************************************************/
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void CC1101::SpiWriteBurstReg(byte addr, byte* buffer, byte num) {
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byte i, temp;
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temp = addr | WRITE_BURST;
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(temp);
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for(i = 0; i < num; i++) {
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SpiTransfer(buffer[i]);
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}
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digitalWrite(ss_pin, HIGH);
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}
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/****************************************************************
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*FUNCTION NAME:SpiStrobe
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*FUNCTION :CC1101 Strobe
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*INPUT :strobe: command; //refer define in CC1101.h//
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*OUTPUT :none
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****************************************************************/
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void CC1101::SpiStrobe(byte strobe) {
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(strobe);
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digitalWrite(ss_pin, HIGH);
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}
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/****************************************************************
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*FUNCTION NAME:SpiReadReg
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*FUNCTION :CC1101 read data from register
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*INPUT :addr: register address
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*OUTPUT :register value
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****************************************************************/
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byte CC1101::SpiReadReg(byte addr) {
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byte temp, value;
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temp = addr | READ_SINGLE;
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(temp);
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value = SpiTransfer(0);
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digitalWrite(ss_pin, HIGH);
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return value;
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}
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/****************************************************************
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*FUNCTION NAME:SpiReadBurstReg
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*FUNCTION :CC1101 read burst data from register
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*INPUT :addr: register address; buffer:array to store register value; num: number to read
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*OUTPUT :none
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****************************************************************/
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void CC1101::SpiReadBurstReg(byte addr, byte* buffer, byte num) {
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byte i, temp;
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temp = addr | READ_BURST;
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(temp);
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for(i = 0; i < num; i++) {
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buffer[i] = SpiTransfer(0);
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}
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digitalWrite(ss_pin, HIGH);
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}
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/****************************************************************
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*FUNCTION NAME:SpiReadStatus
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*FUNCTION :CC1101 read status register
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*INPUT :addr: register address
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*OUTPUT :status value
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****************************************************************/
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byte CC1101::SpiReadStatus(byte addr) {
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byte value, temp;
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temp = addr | READ_BURST;
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(temp);
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value = SpiTransfer(0);
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digitalWrite(ss_pin, HIGH);
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return value;
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}
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/****************************************************************
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*FUNCTION NAME:Reset
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*FUNCTION :CC1101 reset //details refer datasheet of CC1101/CC1100//
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*INPUT :none
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*OUTPUT :none
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****************************************************************/
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void CC1101::Reset(void) {
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digitalWrite(ss_pin, LOW);
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delay(1);
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digitalWrite(ss_pin, HIGH);
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delay(1);
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digitalWrite(ss_pin, LOW);
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while(digitalRead(MISO_PIN))
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;
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SpiTransfer(CC1101_SRES);
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while(digitalRead(MISO_PIN))
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;
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digitalWrite(ss_pin, HIGH);
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}
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/****************************************************************
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*FUNCTION NAME:Init
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*FUNCTION :CC1101 initialization
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*INPUT :none
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*OUTPUT :none
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****************************************************************/
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byte CC1101::Init(void) {
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#ifdef CC1101_DEBUG
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printf("Init SPI...\n");
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#endif
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SpiInit(); //spi initialization
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digitalWrite(ss_pin, HIGH);
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// digitalWrite(SCK_PIN, HIGH);
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// digitalWrite(MOSI_PIN, LOW);
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#ifdef CC1101_DEBUG
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printf("Reset CC1101...\n");
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#endif
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Reset(); //CC1101 reset
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byte partnum, version;
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partnum = SpiReadStatus(CC1101_PARTNUM);
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version = SpiReadStatus(CC1101_VERSION);
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#ifdef CC1101_DEBUG
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printf("Partnum:0x%02X, Version:0x%02X\n", partnum, version);
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#endif
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#ifdef CC1101_DEBUG
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printf("Init CC1101...");
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#endif
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RegConfigSettings(); //CC1101 register config
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#ifdef CC1101_DEBUG
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printf("Done!\n");
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#endif
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return version;
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}
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/****************************************************************
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*FUNCTION NAME:SetMod
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*FUNCTION :CC1101 modulation type
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*INPUT :byte mode
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*OUTPUT :none
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****************************************************************/
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void CC1101::SetMod(byte mode) {
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SpiWriteReg(CC1101_MDMCFG2, mode); //no sync/preamble; ASK/OOK only support up to -1dbm
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if((mode | 0x30) == ASK) {
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SpiWriteReg(CC1101_FREND0, 0x11); //use first up to PATABLE(0)
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byte PaTabel[8] = {0x00, POWER, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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SpiWriteBurstReg(CC1101_PATABLE, PaTabel, 8); //CC1101 PATABLE config
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} else {
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SpiWriteReg(CC1101_FREND0, 0x10); //use first up to PATABLE(0)
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byte PaTabel[8] = {POWER, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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SpiWriteBurstReg(CC1101_PATABLE, PaTabel, 8); //CC1101 PATABLE config
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}
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#ifdef CC1101_DEBUG
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switch(mode | 0x30) {
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case GFSK: {
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printf("CC1101 Modulation: GFSK");
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break;
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}
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case MSK: {
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printf("CC1101 Modulation: MSK");
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break;
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}
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case ASK: {
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printf("CC1101 Modulation: ASK/OOK");
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break;
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}
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case FSK2: {
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printf("CC1101 Modulation: 2-FSK");
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break;
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}
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case FSK4: {
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printf("CC1101 Modulation: 4-FSK");
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break;
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}
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default: //default to GFSK
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{
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printf("Modulation mode not supported");
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break;
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}
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}
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printf("\n");
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#endif
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}
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/****************************************************************
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*FUNCTION NAME:RegConfigSettings
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*FUNCTION :CC1101 register config //details refer datasheet of CC1101/CC1100//
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*INPUT :none
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*OUTPUT :none
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****************************************************************/
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void CC1101::RegConfigSettings(void) {
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SpiWriteReg(CC1101_FSCTRL1, 0x06); //IF frequency
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SpiWriteReg(CC1101_FSCTRL0, 0x00); //frequency offset before synthesizer
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SpiWriteReg(CC1101_MDMCFG4, 0xCC); // RX filter bandwidth 100k(0xcc)
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SpiWriteReg(
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CC1101_MDMCFG3, 0x43); //datarate config 512kBaud for the purpose of fast rssi measurement
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SpiWriteReg(CC1101_MDMCFG1, 0x21); //FEC preamble etc. last 2 bits for channel spacing
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SpiWriteReg(CC1101_MDMCFG0, 0xF8); //100khz channel spacing
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//CC1101_CHANNR moved to SetChannel func
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//SpiWriteReg(CC1101_DEVIATN, 0x47);
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SpiWriteReg(
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CC1101_MCSM0, 0x18); // calibrate when going from IDLE to RX or TX ; 149 - 155 μs timeout
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SpiWriteReg(CC1101_FOCCFG, 0x16); //frequency compensation
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//SpiWriteReg(CC1101_BSCFG, 0x1C); //bit synchronization config
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SpiWriteReg(CC1101_AGCCTRL2, 0x43);
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SpiWriteReg(CC1101_AGCCTRL1, 0x49);
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SpiWriteReg(CC1101_AGCCTRL0, 0x91);
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//freq synthesizer calibration
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SpiWriteReg(CC1101_FSCAL3, 0xEA);
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SpiWriteReg(CC1101_FSCAL2, 0x2A);
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SpiWriteReg(CC1101_FSCAL1, 0x00);
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SpiWriteReg(CC1101_FSCAL0, 0x1F);
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SpiWriteReg(CC1101_TEST2, 0x81);
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SpiWriteReg(CC1101_TEST1, 0x35);
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SpiWriteReg(CC1101_TEST0, 0x0B); //should be 0x0B for lower than 430.6MHz and 0x09 for higher
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//SpiWriteReg(CC1101_FREND1, 0x56);
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//SpiWriteReg(CC1101_IOCFG2, 0x0B); //serial clock.synchronous to the data in synchronous serial mode
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//SpiWriteReg(CC1101_IOCFG0, 0x06); //asserts when sync word has been sent/received, and de-asserts at the end of the packet
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SpiWriteReg(CC1101_IOCFG2, 0x0D); //data output pin for asynchronous mode
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SpiWriteReg(
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CC1101_IOCFG0,
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0x2E); //High impedance (3-state), GDO0 configed as data input for asynchronous mode
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||||||
|
//SpiWriteReg(CC1101_PKTCTRL0, 0x05); //whitening off;CRC Enable；variable length packets, packet length configured by the first byte after sync word
|
||||||
|
SpiWriteReg(
|
||||||
|
CC1101_PKTCTRL0, 0x33); //whitening off; asynchronous serial mode; CRC diable；reserved
|
||||||
|
//SpiWriteReg(CC1101_PKTLEN, 0x3D); //61 bytes max length
|
||||||
|
SpiWriteReg(
|
||||||
|
CC1101_FIFOTHR,
|
||||||
|
0x47); //Adc_retention enabled for RX filter bandwidth less than 325KHz; defalut fifo threthold.
|
||||||
|
}
|
||||||
|
/****************************************************************
|
||||||
|
*FUNCTION NAME:SetFreq
|
||||||
|
*FUNCTION :SetFreq
|
||||||
|
*INPUT :Freq2, Freq1, Freq0
|
||||||
|
*OUTPUT :none
|
||||||
|
****************************************************************/
|
||||||
|
void CC1101::SetFreq(byte freq2, byte freq1, byte freq0) {
|
||||||
|
SpiWriteReg(CC1101_FREQ2, freq2);
|
||||||
|
SpiWriteReg(CC1101_FREQ1, freq1);
|
||||||
|
SpiWriteReg(CC1101_FREQ0, freq0);
|
||||||
|
}
|
||||||
|
/****************************************************************
|
||||||
|
*FUNCTION NAME:SetChannel
|
||||||
|
*FUNCTION :SetChannel
|
||||||
|
*INPUT :int channel
|
||||||
|
*OUTPUT :none
|
||||||
|
****************************************************************/
|
||||||
|
void CC1101::SetChannel(int channel) {
|
||||||
|
#ifdef CC1101_DEBUG
|
||||||
|
printf("Set CC1101 channel to: %d \n", channel);
|
||||||
|
#endif
|
||||||
|
SpiWriteReg(CC1101_CHANNR, (byte)channel); //related to channel numbers
|
||||||
|
}
|
||||||
|
/****************************************************************
|
||||||
|
*FUNCTION NAME:SetReceive
|
||||||
|
*FUNCTION :SetReceive
|
||||||
|
*INPUT :none
|
||||||
|
*OUTPUT :none
|
||||||
|
****************************************************************/
|
||||||
|
void CC1101::SetReceive(void) {
|
||||||
|
SpiStrobe(CC1101_SRX);
|
||||||
|
while(SpiReadStatus(CC1101_MARCSTATE) ^ CC1101_STATUS_RX) {
|
||||||
|
// delay(1);
|
||||||
|
// printf("wait status\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/****************************************************************
|
||||||
|
*FUNCTION NAME:SetTransmit
|
||||||
|
*FUNCTION :
|
||||||
|
*INPUT :none
|
||||||
|
*OUTPUT :none
|
||||||
|
****************************************************************/
|
||||||
|
void CC1101::SetTransmit(void) {
|
||||||
|
SpiStrobe(CC1101_STX);
|
||||||
|
while(SpiReadStatus(CC1101_MARCSTATE) ^ CC1101_STATUS_TX)
|
||||||
|
;
|
||||||
|
}
|
||||||
|
//cc1101 cc1101;
|
||||||
166
applications/cc1101-workaround/cc1101.h
Normal file
166
applications/cc1101-workaround/cc1101.h
Normal file
@ -0,0 +1,166 @@
|
|||||||
|
#pragma once
|
||||||
|
|
||||||
|
#include "flipper_v2.h"
|
||||||
|
|
||||||
|
/*******************************debug mode*************************************/
|
||||||
|
// #define CC1101_DEBUG 1
|
||||||
|
//******************************CC1101 defines ********************************
|
||||||
|
//******************************config registers *****************************
|
||||||
|
#define CC1101_IOCFG2 0x00 //GDO2 output pin configration
|
||||||
|
#define CC1101_IOCFG1 0x01 // GDO1 output pin configuration
|
||||||
|
#define CC1101_IOCFG0 0x02 // GDO0 output pin configuration
|
||||||
|
#define CC1101_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
|
||||||
|
#define CC1101_SYNC1 0x04 // Sync word, high INT8U
|
||||||
|
#define CC1101_SYNC0 0x05 // Sync word, low INT8U
|
||||||
|
#define CC1101_PKTLEN 0x06 // Packet length
|
||||||
|
#define CC1101_PKTCTRL1 0x07 // Packet automation control
|
||||||
|
#define CC1101_PKTCTRL0 0x08 // Packet automation control
|
||||||
|
#define CC1101_ADDR 0x09 // Device address
|
||||||
|
#define CC1101_CHANNR 0x0A // Channel number
|
||||||
|
#define CC1101_FSCTRL1 0x0B // Frequency synthesizer control
|
||||||
|
#define CC1101_FSCTRL0 0x0C // Frequency synthesizer control
|
||||||
|
#define CC1101_FREQ2 0x0D // Frequency control word, high INT8U
|
||||||
|
#define CC1101_FREQ1 0x0E // Frequency control word, middle INT8U
|
||||||
|
#define CC1101_FREQ0 0x0F // Frequency control word, low INT8U
|
||||||
|
#define CC1101_MDMCFG4 0x10 // Modem configuration
|
||||||
|
#define CC1101_MDMCFG3 0x11 // Modem configuration
|
||||||
|
#define CC1101_MDMCFG2 0x12 // Modem configuration
|
||||||
|
#define CC1101_MDMCFG1 0x13 // Modem configuration
|
||||||
|
#define CC1101_MDMCFG0 0x14 // Modem configuration
|
||||||
|
#define CC1101_DEVIATN 0x15 // Modem deviation setting
|
||||||
|
#define CC1101_MCSM2 0x16 // Main Radio Control State Machine configuration
|
||||||
|
#define CC1101_MCSM1 0x17 // Main Radio Control State Machine configuration
|
||||||
|
#define CC1101_MCSM0 0x18 // Main Radio Control State Machine configuration
|
||||||
|
#define CC1101_FOCCFG 0x19 // Frequency Offset Compensation configuration
|
||||||
|
#define CC1101_BSCFG 0x1A // Bit Synchronization configuration
|
||||||
|
#define CC1101_AGCCTRL2 0x1B // AGC control
|
||||||
|
#define CC1101_AGCCTRL1 0x1C // AGC control
|
||||||
|
#define CC1101_AGCCTRL0 0x1D // AGC control
|
||||||
|
#define CC1101_WOREVT1 0x1E // High INT8U Event 0 timeout
|
||||||
|
#define CC1101_WOREVT0 0x1F // Low INT8U Event 0 timeout
|
||||||
|
#define CC1101_WORCTRL 0x20 // Wake On Radio control
|
||||||
|
#define CC1101_FREND1 0x21 // Front end RX configuration
|
||||||
|
#define CC1101_FREND0 0x22 // Front end TX configuration
|
||||||
|
#define CC1101_FSCAL3 0x23 // Frequency synthesizer calibration
|
||||||
|
#define CC1101_FSCAL2 0x24 // Frequency synthesizer calibration
|
||||||
|
#define CC1101_FSCAL1 0x25 // Frequency synthesizer calibration
|
||||||
|
#define CC1101_FSCAL0 0x26 // Frequency synthesizer calibration
|
||||||
|
#define CC1101_RCCTRL1 0x27 // RC oscillator configuration
|
||||||
|
#define CC1101_RCCTRL0 0x28 // RC oscillator configuration
|
||||||
|
#define CC1101_FSTEST 0x29 // Frequency synthesizer calibration control
|
||||||
|
#define CC1101_PTEST 0x2A // Production test
|
||||||
|
#define CC1101_AGCTEST 0x2B // AGC test
|
||||||
|
#define CC1101_TEST2 0x2C // Various test settings
|
||||||
|
#define CC1101_TEST1 0x2D // Various test settings
|
||||||
|
#define CC1101_TEST0 0x2E // Various test settings
|
||||||
|
|
||||||
|
//*********************CC1101 Strobe commands *********************************
|
||||||
|
#define CC1101_SRES 0x30 // Reset chip.
|
||||||
|
|
||||||
|
// Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
|
||||||
|
// If in RX/TX: Go to a wait state where only the synthesizer is
|
||||||
|
// running (for quick RX / TX turnaround).
|
||||||
|
#define CC1101_SFSTXON 0x31
|
||||||
|
|
||||||
|
#define CC1101_SXOFF 0x32 // Turn off crystal oscillator.
|
||||||
|
|
||||||
|
// Calibrate frequency synthesizer and turn it off
|
||||||
|
// (enables quick start).
|
||||||
|
#define CC1101_SCAL 0x33
|
||||||
|
|
||||||
|
// Enable RX. Perform calibration first if coming from IDLE and
|
||||||
|
// MCSM0.FS_AUTOCAL=1.
|
||||||
|
#define CC1101_SRX 0x34
|
||||||
|
|
||||||
|
// In IDLE state: Enable TX. Perform calibration first if
|
||||||
|
// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
|
||||||
|
// Only go to TX if channel is clear.
|
||||||
|
#define CC1101_STX 0x35
|
||||||
|
|
||||||
|
// Exit RX / TX, turn off frequency synthesizer and exit
|
||||||
|
// Wake-On-Radio mode if applicable.
|
||||||
|
#define CC1101_SIDLE 0x36
|
||||||
|
|
||||||
|
#define CC1101_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
|
||||||
|
#define CC1101_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
|
||||||
|
#define CC1101_SPWD 0x39 // Enter power down mode when CSn goes high.
|
||||||
|
#define CC1101_SFRX 0x3A // Flush the RX FIFO buffer.
|
||||||
|
#define CC1101_SFTX 0x3B // Flush the TX FIFO buffer.
|
||||||
|
#define CC1101_SWORRST 0x3C // Reset real time clock.
|
||||||
|
|
||||||
|
// No operation. May be used to pad strobe commands to two
|
||||||
|
// INT8Us for simpler software.
|
||||||
|
#define CC1101_SNOP 0x3D
|
||||||
|
|
||||||
|
//**************************CC1101 STATUS REGSITER ****************************
|
||||||
|
//use burst read to access
|
||||||
|
#define CC1101_PARTNUM 0x30
|
||||||
|
#define CC1101_VERSION 0x31
|
||||||
|
#define CC1101_FREQEST 0x32
|
||||||
|
#define CC1101_LQI 0x33
|
||||||
|
#define CC1101_RSSI 0x34
|
||||||
|
#define CC1101_MARCSTATE 0x35
|
||||||
|
#define CC1101_WORTIME1 0x36
|
||||||
|
#define CC1101_WORTIME0 0x37
|
||||||
|
#define CC1101_PKTSTATUS 0x38
|
||||||
|
#define CC1101_VCO_VC_DAC 0x39
|
||||||
|
#define CC1101_TXBYTES 0x3A
|
||||||
|
#define CC1101_RXBYTES 0x3B
|
||||||
|
#define CC1101_RCCTRL1_STATUS 0x3C
|
||||||
|
#define CC1101_RCCTRL_STATUS 0x3D
|
||||||
|
/****************************cc1101 status ***********************************/
|
||||||
|
#define CC1101_STATUS_RX 0x0D
|
||||||
|
#define CC1101_STATUS_TX 0x13
|
||||||
|
|
||||||
|
//***********************CC1101 PATABLE,TXFIFO,RXFIFO**************************
|
||||||
|
#define CC1101_PATABLE 0x3E
|
||||||
|
#define CC1101_TXFIFO 0x3F
|
||||||
|
#define CC1101_RXFIFO 0x3F
|
||||||
|
|
||||||
|
//******************************* pins ****************************************
|
||||||
|
// #define SCK_PIN 13
|
||||||
|
// #define MISO_PIN 12
|
||||||
|
// #define MOSI_PIN 11
|
||||||
|
// #define SS_PIN 10
|
||||||
|
// #define GDO0 8 //pin assignment
|
||||||
|
// #define GDO2 9
|
||||||
|
//*****************************CC1101 Config**********************************
|
||||||
|
//no pa ramping, output power to 10dBm
|
||||||
|
#define POWER 0xC0 //output power to maximum
|
||||||
|
//modulation
|
||||||
|
#define FSK2 0x00
|
||||||
|
#define GFSK 0x10
|
||||||
|
#define ASK 0x30
|
||||||
|
#define FSK4 0x40
|
||||||
|
#define MSK 0x70
|
||||||
|
//******************************** class **************************************//
|
||||||
|
class CC1101 {
|
||||||
|
private:
|
||||||
|
GpioPin ss_pin;
|
||||||
|
GpioPin gdo0_pin;
|
||||||
|
GpioPin gdo2_pin;
|
||||||
|
|
||||||
|
private:
|
||||||
|
void SpiMode(byte config);
|
||||||
|
byte SpiTransfer(byte value);
|
||||||
|
void Reset(void);
|
||||||
|
void SpiWriteBurstReg(byte addr, byte* buffer, byte num);
|
||||||
|
byte SpiReadReg(byte addr);
|
||||||
|
void SpiReadBurstReg(byte addr, byte* buffer, byte num);
|
||||||
|
void RegConfigSettings(void);
|
||||||
|
|
||||||
|
public:
|
||||||
|
CC1101(GpioPin ss_pin);
|
||||||
|
|
||||||
|
void SpiWriteReg(byte addr, byte value);
|
||||||
|
void SpiInit(void);
|
||||||
|
void SpiEnd(void);
|
||||||
|
void SetMod(byte mode);
|
||||||
|
void SetFreq(byte Freq2, byte Freq1, byte Freq0);
|
||||||
|
byte Init(void);
|
||||||
|
void SpiStrobe(byte strobe);
|
||||||
|
byte SpiReadStatus(byte addr);
|
||||||
|
void SetReceive(void);
|
||||||
|
void SetTransmit(void);
|
||||||
|
void SetChannel(int channel);
|
||||||
|
};
|
||||||
Loading…
x
Reference in New Issue
Block a user