diff --git a/applications/cc1101-workaround/cc1101-workaround.cpp b/applications/cc1101-workaround/cc1101-workaround.cpp index 0f84deaf..57405ed7 100644 --- a/applications/cc1101-workaround/cc1101-workaround.cpp +++ b/applications/cc1101-workaround/cc1101-workaround.cpp @@ -32,15 +32,15 @@ typedef struct { uint16_t channel; } FreqConfig; -void setup_freq(CC1101* cc1101, const FreqConfig* config) { +void setup_freq(CC1101* cc1101, float freq) { // cc1101->SpiWriteReg(CC1101_MCSM0, 0x08); // disalbe FS_AUTOCAL // cc1101->SpiWriteReg(CC1101_AGCCTRL2, 0x43 | 0x0C); // MAX_DVGA_GAIN to 11 for fast rssi // cc1101->SpiWriteReg(CC1101_AGCCTRL0, 0xB0); // max AGC WAIT_TIME; 0 filter_length // cc1101->SetMod(GFSK); // set to GFSK for fast rssi measurement | +8 is dcfilter off - uint32_t freq_reg = config->band->base_freq * 1e6 / (F_OSC / 65536); + uint32_t freq_reg = freq * 1e6 / (F_OSC / 65536); cc1101->SetFreq((freq_reg >> 16) & 0xFF, (freq_reg >> 8) & 0xFF, (freq_reg)&0xFF); - cc1101->SetChannel(config->channel); + cc1101->SetChannel(0); /* //set test0 to 0x09 @@ -117,22 +117,12 @@ int16_t rx_rssi(CC1101* cc1101, const FreqConfig* config) { return rssi_dBm; } +/* void flp_config(CC1101* cc1101) { - // cc1101->SpiWriteReg(CC1101_FSCTRL1, 0x06); //IF frequency - // cc1101->SpiWriteReg(CC1101_FSCTRL0, 0x00); //frequency offset before synthesizer - - // cc1101->SpiWriteReg(CC1101_MDMCFG4, 0xCC); // RX filter bandwidth 100k(0xcc) - // cc1101->SpiWriteReg(CC1101_MDMCFG3, 0x43); //datarate config 512kBaud for the purpose of fast rssi measurement - // cc1101->SpiWriteReg(CC1101_MDMCFG1, 0x21); //FEC preamble etc. last 2 bits for channel spacing - // cc1101->SpiWriteReg(CC1101_MDMCFG0, 0xF8); //100khz channel spacing - // CC1101_CHANNR moved to SetChannel func - cc1101->SpiWriteReg( CC1101_MCSM0, 0x18); // calibrate when going from IDLE to RX or TX ; 149 - 155 μs timeout // MCSM0.FS_AUTOCAL[1:0] = 1 - // cc1101->SpiSetRegValue(CC1101_MCSM0, 1, 5, 4); // this not work - // cc1101->SpiWriteReg(CC1101_FOCCFG, 0x16); //frequency compensation cc1101->SpiWriteReg(CC1101_AGCCTRL2, 0x43); cc1101->SpiWriteReg(CC1101_AGCCTRL1, 0x49); cc1101->SpiWriteReg(CC1101_AGCCTRL0, 0x91); @@ -142,19 +132,10 @@ void flp_config(CC1101* cc1101) { cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A); cc1101->SpiWriteReg(CC1101_FSCAL1, 0x00); cc1101->SpiWriteReg(CC1101_FSCAL0, 0x1F); - // cc1101->SpiWriteReg(CC1101_TEST2, 0x81); - // cc1101->SpiWriteReg(CC1101_TEST1, 0x35); - // cc1101->SpiWriteReg(CC1101_TEST0, 0x0B); //should be 0x0B for lower than 430.6MHz and 0x09 for higher - - // cc1101->SpiWriteReg(CC1101_IOCFG2, 0x0D); //data output pin for asynchronous mode - // cc1101->SpiWriteReg(CC1101_IOCFG0, 0x2E); //High impedance (3-state), GDO0 configed as data input for asynchronous mode - // cc1101->SpiWriteReg(CC1101_PKTCTRL0, 0x33); //whitening off; asynchronous serial mode; CRC diable；reserved - // cc1101->SpiWriteReg(CC1101_FIFOTHR, 0x47); //Adc_retention enabled for RX filter bandwidth less than 325KHz; defalut fifo threthold. - - // === Transparent mode === // async data out - cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0); + cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0); // GDO0 Output Pin Configuration + cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0); // WAT // FIFOTHR.ADC_RETENTION = 1 cc1101->SpiSetRegValue(CC1101_FIFOTHR, 1, 6, 6); @@ -184,68 +165,13 @@ void flp_config(CC1101* cc1101) { printf("wrong bitrate\n"); } - cc1101->SetReceive(); - // mod // MDMCFG2.MOD_FORMAT = 3 (3: OOK, 0: 2-FSK) cc1101->SpiSetRegValue(CC1101_MDMCFG2, 3, 6, 4); // MDMCFG2.SYNC_MODE = 0 cc1101->SpiSetRegValue(CC1101_MDMCFG2, 0, 2, 0); } - -void async_config(CC1101* cc1101) { - cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0); // GDO0 Output Pin Configuration - - // FIFOTHR.ADC_RETENTION = 1 - cc1101->SpiSetRegValue(CC1101_FIFOTHR, 1, 6, 6); - - // PKTCTRL1.APPEND_STATUS = 0 - cc1101->SpiSetRegValue(CC1101_PKTCTRL1, 0, 2, 2); - - cc1101->SpiWriteReg(CC1101_PKTCTRL0, 0x32); // Packet Automation Control - /* - FIXME: this sequence not work - // PKTCTRL0.PKT_FORMAT = 3 - cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 3, 5, 4); - // PKTCTRL0.LENGTH_CONFIG = 2 // Infinite packet length mode - cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 2, 1, 0); - // PKTCTRL0.CRC_EN = 0 - cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 2, 2); - // PKTCTRL0.WHITE_DATA = 0 - cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 6, 6); - */ - - cc1101->SpiWriteReg(CC1101_MDMCFG4, 0xD6); //Modem Configuration - cc1101->SpiWriteReg(CC1101_MDMCFG3, 0xE4); //Modem Configuration - /* - FIXME: not work - // bandwidth 50-100 kHz - if(!cc1101->setRxBandwidth(75.0)) { - printf("wrong rx bw\n"); - } - - // datarate ~30 kbps - if(!cc1101->setBitRate(100.)) { - printf("wrong bitrate\n"); - } - */ - - cc1101->SpiWriteReg(CC1101_MDMCFG2, 0x30); //Modem Configuration - /* - FIXME: not work - // MDMCFG2.MOD_FORMAT = 3 (3: OOK, 0: 2-FSK) - cc1101->SpiSetRegValue(CC1101_MDMCFG2, 3, 6, 4); - // MDMCFG2.SYNC_MODE = 0 - cc1101->SpiSetRegValue(CC1101_MDMCFG2, 0, 2, 0); - */ - - cc1101->SpiWriteReg(CC1101_MCSM0, 0x18); //Main Radio Control State Machine Configuration - - cc1101->SpiWriteReg(CC1101_FSCAL3, 0xE9); //Frequency Synthesizer Calibration - cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A); //Frequency Synthesizer Calibration - cc1101->SpiWriteReg(CC1101_FSCAL1, 0x00); //Frequency Synthesizer Calibration - cc1101->SpiWriteReg(CC1101_FSCAL0, 0x1F); //Frequency Synthesizer Calibration -} +*/ void tx_config(CC1101* cc1101) { // cc1101->SpiWriteReg(CC1101_IOCFG2,0x0B); //GDO2 Output Pin Configuration @@ -270,9 +196,12 @@ void tx_config(CC1101* cc1101) { cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A); //Frequency Synthesizer Calibration cc1101->SpiWriteReg(CC1101_FSCAL1, 0x00); //Frequency Synthesizer Calibration cc1101->SpiWriteReg(CC1101_FSCAL0, 0x1F); //Frequency Synthesizer Calibration + + /* cc1101->SpiWriteReg(CC1101_TEST2, 0x81); //Various Test Settings cc1101->SpiWriteReg(CC1101_TEST1, 0x35); //Various Test Settings cc1101->SpiWriteReg(CC1101_TEST0, 0x09); //Various Test Settings + */ } // f = (f_osc/65536) * (FREQ + CHAN * (256 + CH_SP_M) * 2^(CH_SP_E - 2)) @@ -285,7 +214,7 @@ const Band bands[] = { {300., {0x00, 0x00, 0x00}, 0, 255, 74}, {315., {0x00, 0x00, 0x00}, 0, 255, 74}, {348., {0x00, 0x00, 0x00}, 0, 255, 74}, - {387., {0x00, 0x00, 0x00}, 0, 255, 74}, + {386., {0x00, 0x00, 0x00}, 0, 255, 74}, {433.92, {0x00, 0x00, 0x00}, 0, 255, 74}, {438.9, {0x00, 0x00, 0x00}, 0, 255, 74}, {464., {0x00, 0x00, 0x00}, 0, 255, 74}, @@ -341,7 +270,8 @@ const TxLevel TX_LEVELS[] = { typedef struct { Mode mode; - size_t active_freq; + size_t active_freq_idx; + float active_freq; int16_t last_rssi; size_t tx_level; bool need_cc1101_conf; @@ -359,9 +289,11 @@ static void render_callback(Canvas* canvas, void* ctx) { { char buf[24]; - FreqConfig conf = FREQ_LIST[state->active_freq]; - float freq = conf.band->base_freq + CHAN_SPA * conf.channel; - sprintf(buf, "freq: %ld.%02ld MHz", (uint32_t)freq, (uint32_t)(freq * 100.) % 100); + sprintf( + buf, + "freq: %ld.%02ld MHz", + (uint32_t)state->active_freq, + (uint32_t)(state->active_freq * 100.) % 100); canvas_set_font(canvas, FontSecondary); canvas_draw_str(canvas, 2, 25, buf); @@ -417,7 +349,11 @@ extern "C" void cc1101_workaround(void* p) { State _state; _state.mode = ModeRx; - _state.active_freq = 4; + _state.active_freq_idx = 4; + + FreqConfig conf = FREQ_LIST[_state.active_freq_idx]; + _state.active_freq = conf.band->base_freq + CHAN_SPA * conf.channel; + _state.need_cc1101_conf = true; _state.last_rssi = 0; _state.tx_level = 0; @@ -465,7 +401,6 @@ extern "C" void cc1101_workaround(void* p) { cc1101.SpiStrobe(CC1101_SIDLE); // flp_config(&cc1101); - // async_config(&cc1101); tx_config(&cc1101); // setup_freq(&cc1101, &FREQ_LIST[4]); // enable_cc1101_irq(); @@ -498,27 +433,49 @@ extern "C" void cc1101_workaround(void* p) { furiac_exit(NULL); } - if(event.value.input.state && event.value.input.input == InputUp) { - if(state->active_freq > 0) { - state->active_freq--; - state->need_cc1101_conf = true; - } - } - if(event.value.input.state && event.value.input.input == InputDown) { - if(state->active_freq < (sizeof(FREQ_LIST) / sizeof(FREQ_LIST[0]) - 1)) { - state->active_freq++; - state->need_cc1101_conf = true; + if(state->active_freq_idx > 0) { + state->active_freq_idx--; } + + FreqConfig conf = FREQ_LIST[state->active_freq_idx]; + state->active_freq = conf.band->base_freq + CHAN_SPA * conf.channel; + state->need_cc1101_conf = true; } - if(event.value.input.state && event.value.input.input == InputLeft) { + if(event.value.input.state && event.value.input.input == InputUp) { + if(state->active_freq_idx < (sizeof(FREQ_LIST) / sizeof(FREQ_LIST[0]) - 1)) { + state->active_freq_idx++; + } + + FreqConfig conf = FREQ_LIST[state->active_freq_idx]; + state->active_freq = conf.band->base_freq + CHAN_SPA * conf.channel; + state->need_cc1101_conf = true; + } + + if(event.value.input.state && event.value.input.input == InputRight) { + /* if(state->tx_level < (sizeof(TX_LEVELS) / sizeof(TX_LEVELS[0]) - 1)) { state->tx_level++; } else { state->tx_level = 0; } + */ + state->active_freq += 0.25; + state->need_cc1101_conf = true; + } + + if(event.value.input.state && event.value.input.input == InputLeft) { + /* + if(state->tx_level < (sizeof(TX_LEVELS) / sizeof(TX_LEVELS[0]) - 1)) { + state->tx_level++; + } else { + state->tx_level = 0; + } + */ + + state->active_freq -= 0.25; state->need_cc1101_conf = true; } @@ -535,14 +492,14 @@ extern "C" void cc1101_workaround(void* p) { cc1101.SpiStrobe(CC1101_SIDLE); gpio_init(&cc1101_g0_gpio, GpioModeInput); - setup_freq(&cc1101, &FREQ_LIST[state->active_freq]); + setup_freq(&cc1101, state->active_freq); cc1101.SetReceive(); - state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq]); + state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq_idx]); } else if(state->mode == ModeTx) { cc1101.SpiStrobe(CC1101_SIDLE); - setup_freq(&cc1101, &FREQ_LIST[state->active_freq]); + setup_freq(&cc1101, state->active_freq); cc1101.SetTransmit(); gpio_init(&cc1101_g0_gpio, GpioModeOutputPushPull); gpio_write(&cc1101_g0_gpio, false); @@ -552,7 +509,8 @@ extern "C" void cc1101_workaround(void* p) { } if(!state->need_cc1101_conf && state->mode == ModeRx) { - state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq]); + // TOOD what about rssi offset + state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq_idx]); gpio_write(led_record, state->last_rssi < RSSI_THRESHOLD); } else if(!state->need_cc1101_conf && state->mode == ModeTx) {