Debug: adjust openocd config for max speed (#278)
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							| @ -0,0 +1,103 @@ | |||||||
|  | # script for stm32wbx family | ||||||
|  | 
 | ||||||
|  | # | ||||||
|  | # stm32wb devices support both JTAG and SWD transports. | ||||||
|  | # | ||||||
|  | source [find target/swj-dp.tcl] | ||||||
|  | source [find mem_helper.tcl] | ||||||
|  | 
 | ||||||
|  | if { [info exists CHIPNAME] } { | ||||||
|  |    set _CHIPNAME $CHIPNAME | ||||||
|  | } else { | ||||||
|  |    set _CHIPNAME stm32wbx | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | set _ENDIAN little | ||||||
|  | 
 | ||||||
|  | # Work-area is a space in RAM used for flash programming | ||||||
|  | # By default use 64kB | ||||||
|  | if { [info exists WORKAREASIZE] } { | ||||||
|  |    set _WORKAREASIZE $WORKAREASIZE | ||||||
|  | } else { | ||||||
|  |    set _WORKAREASIZE 0x10000 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | #jtag scan chain | ||||||
|  | if { [info exists CPUTAPID] } { | ||||||
|  |    set _CPUTAPID $CPUTAPID | ||||||
|  | } else { | ||||||
|  |    if { [using_jtag] } { | ||||||
|  |       set _CPUTAPID 0x6ba00477 | ||||||
|  |    } else { | ||||||
|  |       # SWD IDCODE (single drop, arm) | ||||||
|  |       set _CPUTAPID 0x6ba02477 | ||||||
|  |    } | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID | ||||||
|  | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu | ||||||
|  | 
 | ||||||
|  | if {[using_jtag]} { | ||||||
|  |    jtag newtap $_CHIPNAME bs -irlen 5 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | set _TARGETNAME $_CHIPNAME.cpu | ||||||
|  | target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap | ||||||
|  | 
 | ||||||
|  | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 | ||||||
|  | 
 | ||||||
|  | set _FLASHNAME $_CHIPNAME.flash | ||||||
|  | flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME | ||||||
|  | 
 | ||||||
|  | # Common knowledges tells JTAG speed should be <= F_CPU/6. | ||||||
|  | # F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on | ||||||
|  | # the safe side. | ||||||
|  | # | ||||||
|  | # Note that there is a pretty wide band where things are | ||||||
|  | # more or less stable, see http://openocd.zylin.com/#/c/3366/ | ||||||
|  | adapter speed 8000 | ||||||
|  | 
 | ||||||
|  | adapter srst delay 100 | ||||||
|  | if {[using_jtag]} { | ||||||
|  |  jtag_ntrst_delay 100 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | reset_config srst_nogate | ||||||
|  | 
 | ||||||
|  | if {![using_hla]} { | ||||||
|  |    # if srst is not fitted use SYSRESETREQ to | ||||||
|  |    # perform a soft reset | ||||||
|  |    cortex_m reset_config sysresetreq | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | $_TARGETNAME configure -event reset-init { | ||||||
|  |     # CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 4 MHz. | ||||||
|  |     # Configure system to use MSI 24 MHz clock, compliant with VOS default Range1. | ||||||
|  |     # 2 WS compliant with VOS=Range1 and 24 MHz. | ||||||
|  |     mmw 0x58004000 0x00000102 0  ;# FLASH_ACR |= PRFTBE | 2(Latency) | ||||||
|  |     mmw 0x58000000 0x00000091 0  ;# RCC_CR = MSI_ON | MSI Range 24 MHz | ||||||
|  |     # Boost JTAG frequency | ||||||
|  |     adapter speed 8000 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | $_TARGETNAME configure -event reset-start { | ||||||
|  |     # Reset clock is MSI (4 MHz) | ||||||
|  |     adapter speed 8000 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | $_TARGETNAME configure -event examine-end { | ||||||
|  |     # Enable debug during low power modes (uses more power) | ||||||
|  |     # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP | ||||||
|  |     mmw 0xE0042004 0x00000007 0 | ||||||
|  | 
 | ||||||
|  |     # Stop watchdog counters during halt | ||||||
|  |     # DBGMCU_APB1_FZR1 |= DBG_IWDG_STOP | DBG_WWDG_STOP | ||||||
|  |     mmw 0xE004203C 0x00001800 0 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | $_TARGETNAME configure -event trace-config { | ||||||
|  |     # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync | ||||||
|  |     # change this value accordingly to configure trace pins | ||||||
|  |     # assignment | ||||||
|  |     mmw 0xE0042004 0x00000020 0 | ||||||
|  | } | ||||||
| @ -1,6 +1,6 @@ | |||||||
| TOOLCHAIN = arm | TOOLCHAIN = arm | ||||||
| 
 | 
 | ||||||
| OPENOCD_OPTS	= -f interface/stlink.cfg -c "transport select hla_swd" -f target/stm32wbx.cfg -c "init" -c "adapter speed 4000" | OPENOCD_OPTS	= -f interface/stlink.cfg -c "transport select hla_swd" -f ../debug/stm32wbx.cfg -c "init" | ||||||
| 
 | 
 | ||||||
| BOOT_ADDRESS	= 0x08000000 | BOOT_ADDRESS	= 0x08000000 | ||||||
| FW_ADDRESS		= 0x08008000 | FW_ADDRESS		= 0x08008000 | ||||||
|  | |||||||
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