mount/flipperzero-firmware
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Merge remote-tracking branch 'origin/dev' into release-candidate

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This commit is contained in:
Aleksandr Kutuzov 2023-04-26 15:39:56 +09:00
commit df78ba8e09
6 changed files with 58 additions and 38 deletions
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2
firmware/targets/f7/ble_glue/ble_app.c
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@ -88,7 +88,7 @@ bool ble_app_init() {
.min_tx_power = 0,
.max_tx_power = 0,
.rx_model_config = 1,
/* New stack (13.3->16.0)*/
/* New stack (13.3->15.0) */
.max_adv_set_nbr = 1, // Only used if SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV is set
.max_adv_data_len = 31, // Only used if SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV is set
.tx_path_compens = 0, // RF TX Path Compensation, * 0.1 dB

8
firmware/targets/f7/furi_hal/furi_hal_bt.c
View File

@ -84,9 +84,7 @@ void furi_hal_bt_init() {
}
// Explicitly tell that we are in charge of CLK48 domain
if(!LL_HSEM_IsSemaphoreLocked(HSEM, CFG_HW_CLK48_CONFIG_SEMID)) {
furi_check(LL_HSEM_1StepLock(HSEM, CFG_HW_CLK48_CONFIG_SEMID) == 0);
}
furi_check(LL_HSEM_1StepLock(HSEM, CFG_HW_CLK48_CONFIG_SEMID) == 0);
// Start Core2
ble_glue_init();
@ -129,9 +127,7 @@ bool furi_hal_bt_start_radio_stack() {
furi_mutex_acquire(furi_hal_bt_core2_mtx, FuriWaitForever);
// Explicitly tell that we are in charge of CLK48 domain
if(!LL_HSEM_IsSemaphoreLocked(HSEM, CFG_HW_CLK48_CONFIG_SEMID)) {
furi_check(LL_HSEM_1StepLock(HSEM, CFG_HW_CLK48_CONFIG_SEMID) == 0);
}
furi_check(LL_HSEM_1StepLock(HSEM, CFG_HW_CLK48_CONFIG_SEMID) == 0);
do {
// Wait until C2 is started or timeout

10
firmware/targets/f7/furi_hal/furi_hal_clock.c
View File

@ -213,7 +213,11 @@ void furi_hal_clock_switch_to_hsi() {
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
;
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
LL_C2_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_0)
;
}
void furi_hal_clock_switch_to_pll() {
@ -228,7 +232,11 @@ void furi_hal_clock_switch_to_pll() {
while(!LL_RCC_PLLSAI1_IsReady())
;
LL_C2_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_3);
while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_3)
;
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSE);

21
firmware/targets/f7/furi_hal/furi_hal_power.c
View File

@ -29,10 +29,6 @@
#define FURI_HAL_POWER_DEBUG_STOP_GPIO (&gpio_ext_pc3)
#endif
#ifndef FURI_HAL_POWER_DEBUG_ABNORMAL_GPIO
#define FURI_HAL_POWER_DEBUG_ABNORMAL_GPIO (&gpio_ext_pb3)
#endif
#ifndef FURI_HAL_POWER_STOP_MODE
#define FURI_HAL_POWER_STOP_MODE (LL_PWR_MODE_STOP2)
#endif
@ -92,10 +88,8 @@ void furi_hal_power_init() {
#ifdef FURI_HAL_POWER_DEBUG
furi_hal_gpio_init_simple(FURI_HAL_POWER_DEBUG_WFI_GPIO, GpioModeOutputPushPull);
furi_hal_gpio_init_simple(FURI_HAL_POWER_DEBUG_STOP_GPIO, GpioModeOutputPushPull);
furi_hal_gpio_init_simple(FURI_HAL_POWER_DEBUG_ABNORMAL_GPIO, GpioModeOutputPushPull);
furi_hal_gpio_write(FURI_HAL_POWER_DEBUG_WFI_GPIO, 0);
furi_hal_gpio_write(FURI_HAL_POWER_DEBUG_STOP_GPIO, 0);
furi_hal_gpio_write(FURI_HAL_POWER_DEBUG_ABNORMAL_GPIO, 0);
#endif
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
@ -158,9 +152,7 @@ bool furi_hal_power_sleep_available() {
static inline bool furi_hal_power_deep_sleep_available() {
return furi_hal_bt_is_alive() && !furi_hal_rtc_is_flag_set(FuriHalRtcFlagLegacySleep) &&
!furi_hal_debug_is_gdb_session_active() && !LL_PWR_IsActiveFlag_CRPE() &&
!LL_PWR_IsActiveFlag_CRP() && !LL_PWR_IsActiveFlag_BLEA() &&
!LL_PWR_IsActiveFlag_BLEWU();
!furi_hal_debug_is_gdb_session_active();
}
static inline void furi_hal_power_light_sleep() {
@ -211,16 +203,7 @@ static inline void furi_hal_power_deep_sleep() {
__force_stores();
#endif
bool should_abort_sleep = LL_PWR_IsActiveFlag_CRPE() || LL_PWR_IsActiveFlag_CRP() ||
LL_PWR_IsActiveFlag_BLEA() || LL_PWR_IsActiveFlag_BLEWU();
if(should_abort_sleep) {
#ifdef FURI_HAL_POWER_DEBUG
furi_hal_gpio_write(FURI_HAL_POWER_DEBUG_ABNORMAL_GPIO, 1);
#endif
} else {
__WFI();
}
__WFI();
LL_LPM_EnableSleep();

31
furi/core/check.c
View File

@ -14,7 +14,7 @@
#include <stdlib.h>
PLACE_IN_SECTION("MB_MEM2") const char* __furi_check_message = NULL;
PLACE_IN_SECTION("MB_MEM2") uint32_t __furi_check_registers[12] = {0};
PLACE_IN_SECTION("MB_MEM2") uint32_t __furi_check_registers[13] = {0};
/** Load r12 value to __furi_check_message and store registers to __furi_check_registers */
#define GET_MESSAGE_AND_STORE_REGISTERS() \
@ -22,6 +22,7 @@ PLACE_IN_SECTION("MB_MEM2") uint32_t __furi_check_registers[12] = {0};
"str r12, [r11] \n" \
"ldr r12, =__furi_check_registers \n" \
"stm r12, {r0-r11} \n" \
"str lr, [r12, #48] \n" \
: \
: \
: "memory");
@ -62,6 +63,25 @@ static void __furi_put_uint32_as_text(uint32_t data) {
furi_hal_console_puts(tmp_str);
}
static void __furi_put_uint32_as_hex(uint32_t data) {
char tmp_str[] = "0xFFFFFFFF";
itoa(data, tmp_str, 16);
furi_hal_console_puts(tmp_str);
}
static void __furi_print_register_info() {
// Print registers
for(uint8_t i = 0; i < 12; i++) {
furi_hal_console_puts("\r\n\tr");
__furi_put_uint32_as_text(i);
furi_hal_console_puts(" : ");
__furi_put_uint32_as_hex(__furi_check_registers[i]);
}
furi_hal_console_puts("\r\n\tlr : ");
__furi_put_uint32_as_hex(__furi_check_registers[12]);
}
static void __furi_print_stack_info() {
furi_hal_console_puts("\r\n\tstack watermark: ");
__furi_put_uint32_as_text(uxTaskGetStackHighWaterMark(NULL) * 4);
@ -101,32 +121,41 @@ FURI_NORETURN void __furi_crash() {
if(__furi_check_message == NULL) {
__furi_check_message = "Fatal Error";
} else if(__furi_check_message == (void*)__FURI_ASSERT_MESSAGE_FLAG) {
__furi_check_message = "furi_assert failed";
} else if(__furi_check_message == (void*)__FURI_CHECK_MESSAGE_FLAG) {
__furi_check_message = "furi_check failed";
}
furi_hal_console_puts("\r\n\033[0;31m[CRASH]");
__furi_print_name(isr);
furi_hal_console_puts(__furi_check_message);
__furi_print_register_info();
if(!isr) {
__furi_print_stack_info();
}
__furi_print_heap_info();
#ifndef FURI_DEBUG
// Check if debug enabled by DAP
// https://developer.arm.com/documentation/ddi0403/d/Debug-Architecture/ARMv7-M-Debug/Debug-register-support-in-the-SCS/Debug-Halting-Control-and-Status-Register--DHCSR?lang=en
bool debug = CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk;
if(debug) {
#endif
furi_hal_console_puts("\r\nSystem halted. Connect debugger for more info\r\n");
furi_hal_console_puts("\033[0m\r\n");
furi_hal_debug_enable();
RESTORE_REGISTERS_AND_HALT_MCU(true);
#ifndef FURI_DEBUG
} else {
furi_hal_rtc_set_fault_data((uint32_t)__furi_check_message);
furi_hal_console_puts("\r\nRebooting system.\r\n");
furi_hal_console_puts("\033[0m\r\n");
furi_hal_power_reset();
}
#endif
__builtin_unreachable();
}

24
furi/core/check.h
View File

@ -21,6 +21,10 @@ extern "C" {
#define FURI_NORETURN noreturn
#endif
// Flags instead of pointers will save ~4 bytes on furi_assert and furi_check calls.
#define __FURI_ASSERT_MESSAGE_FLAG (0x01)
#define __FURI_CHECK_MESSAGE_FLAG (0x02)
/** Crash system */
FURI_NORETURN void __furi_crash();
@ -44,20 +48,20 @@ FURI_NORETURN void __furi_halt();
} while(0)
/** Check condition and crash if check failed */
#define furi_check(__e) \
do { \
if(!(__e)) { \
furi_crash("furi_check failed\r\n"); \
} \
#define furi_check(__e) \
do { \
if(!(__e)) { \
furi_crash(__FURI_CHECK_MESSAGE_FLAG); \
} \
} while(0)
/** Only in debug build: Assert condition and crash if assert failed */
#ifdef FURI_DEBUG
#define furi_assert(__e) \
do { \
if(!(__e)) { \
furi_crash("furi_assert failed\r\n"); \
} \
#define furi_assert(__e) \
do { \
if(!(__e)) { \
furi_crash(__FURI_ASSERT_MESSAGE_FLAG); \
} \
} while(0)
#else
#define furi_assert(__e) \