d92b0a82cc
"A long time ago in a galaxy far, far away...." we started NFC subsystem refactoring. Starring: - @gornekich - NFC refactoring project lead, architect, senior developer - @gsurkov - architect, senior developer - @RebornedBrain - senior developer Supporting roles: - @skotopes, @DrZlo13, @hedger - general architecture advisors, code review - @Astrrra, @doomwastaken, @Hellitron, @ImagineVagon333 - quality assurance Special thanks: @bettse, @pcunning, @nxv, @noproto, @AloneLiberty and everyone else who has been helping us all this time and contributing valuable knowledges, ideas and source code.
318 lines
12 KiB
C
318 lines
12 KiB
C
#include "signal_reader.h"
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#include <limits.h>
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#include <furi.h>
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#include <furi_hal.h>
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#include <furi_hal_gpio.h>
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#include <stm32wbxx_ll_dma.h>
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#include <stm32wbxx_ll_dmamux.h>
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#include <stm32wbxx_ll_tim.h>
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#include <stm32wbxx_ll_exti.h>
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#include <furi_hal_bus.h>
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#define SIGNAL_READER_DMA DMA2
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#define SIGNAL_READER_CAPTURE_TIM (TIM16)
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#define SIGNAL_READER_CAPTURE_TIM_CHANNEL LL_TIM_CHANNEL_CH1
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#define SIGNAL_READER_DMA_GPIO LL_DMA_CHANNEL_2
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#define SIGNAL_READER_DMA_GPIO_IRQ FuriHalInterruptIdDma2Ch2
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#define SIGNAL_READER_DMA_GPIO_DEF SIGNAL_READER_DMA, SIGNAL_READER_DMA_GPIO
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#define SIGNAL_READER_DMA_TRIGGER LL_DMA_CHANNEL_3
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#define SIGNAL_READER_DMA_TRIGGER_IRQ FuriHalInterruptIdDma2Ch3
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#define SIGNAL_READER_DMA_TRIGGER_DEF SIGNAL_READER_DMA, SIGNAL_READER_DMA_TRIGGER
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#define SIGNAL_READER_DMA_CNT_SYNC LL_DMA_CHANNEL_5
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#define SIGNAL_READER_DMA_CNT_SYNC_IRQ FuriHalInterruptIdDma2Ch5
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#define SIGNAL_READER_DMA_CNT_SYNC_DEF SIGNAL_READER_DMA, SIGNAL_READER_DMA_CNT_SYNC
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struct SignalReader {
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size_t buffer_size;
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const GpioPin* pin;
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GpioPull pull;
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SignalReaderPolarity polarity;
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SignalReaderTrigger trigger;
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uint16_t* gpio_buffer;
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uint8_t* bitstream_buffer;
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uint32_t cnt_en;
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uint32_t tim_cnt_compensation;
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uint32_t tim_arr;
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SignalReaderEvent event;
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SignalReaderEventData event_data;
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SignalReaderCallback callback;
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void* context;
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};
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#define GPIO_PIN_MAP(pin, prefix) \
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(((pin) == (LL_GPIO_PIN_0)) ? prefix##0 : \
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((pin) == (LL_GPIO_PIN_1)) ? prefix##1 : \
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((pin) == (LL_GPIO_PIN_2)) ? prefix##2 : \
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((pin) == (LL_GPIO_PIN_3)) ? prefix##3 : \
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((pin) == (LL_GPIO_PIN_4)) ? prefix##4 : \
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((pin) == (LL_GPIO_PIN_5)) ? prefix##5 : \
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((pin) == (LL_GPIO_PIN_6)) ? prefix##6 : \
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((pin) == (LL_GPIO_PIN_7)) ? prefix##7 : \
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((pin) == (LL_GPIO_PIN_8)) ? prefix##8 : \
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((pin) == (LL_GPIO_PIN_9)) ? prefix##9 : \
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((pin) == (LL_GPIO_PIN_10)) ? prefix##10 : \
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((pin) == (LL_GPIO_PIN_11)) ? prefix##11 : \
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((pin) == (LL_GPIO_PIN_12)) ? prefix##12 : \
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((pin) == (LL_GPIO_PIN_13)) ? prefix##13 : \
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((pin) == (LL_GPIO_PIN_14)) ? prefix##14 : \
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prefix##15)
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#define GET_DMAMUX_EXTI_LINE(pin) GPIO_PIN_MAP(pin, LL_DMAMUX_REQ_GEN_EXTI_LINE)
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SignalReader* signal_reader_alloc(const GpioPin* gpio_pin, uint32_t size) {
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SignalReader* instance = malloc(sizeof(SignalReader));
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instance->pin = gpio_pin;
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instance->pull = GpioPullNo;
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instance->buffer_size = size;
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instance->gpio_buffer = malloc(sizeof(uint16_t) * size * 8);
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instance->bitstream_buffer = malloc(size);
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instance->event.data = &instance->event_data;
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return instance;
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}
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void signal_reader_free(SignalReader* instance) {
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furi_assert(instance);
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furi_assert(instance->gpio_buffer);
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furi_assert(instance->bitstream_buffer);
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free(instance->gpio_buffer);
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free(instance->bitstream_buffer);
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free(instance);
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}
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void signal_reader_set_pull(SignalReader* instance, GpioPull pull) {
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furi_assert(instance);
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instance->pull = pull;
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}
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void signal_reader_set_polarity(SignalReader* instance, SignalReaderPolarity polarity) {
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furi_assert(instance);
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instance->polarity = polarity;
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}
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void signal_reader_set_sample_rate(
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SignalReader* instance,
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SignalReaderTimeUnit time_unit,
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uint32_t time) {
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furi_assert(instance);
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UNUSED(time_unit);
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instance->tim_arr = time;
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}
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void signal_reader_set_trigger(SignalReader* instance, SignalReaderTrigger trigger) {
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furi_assert(instance);
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instance->trigger = trigger;
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}
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static void furi_hal_sw_digital_pin_dma_rx_isr(void* context) {
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SignalReader* instance = context;
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uint16_t* gpio_buff_start = NULL;
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uint8_t* bitstream_buff_start = NULL;
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if(LL_DMA_IsActiveFlag_HT2(SIGNAL_READER_DMA)) {
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LL_DMA_ClearFlag_HT2(SIGNAL_READER_DMA);
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instance->event.type = SignalReaderEventTypeHalfBufferFilled;
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gpio_buff_start = instance->gpio_buffer;
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bitstream_buff_start = instance->bitstream_buffer;
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if(instance->callback) {
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furi_assert(gpio_buff_start);
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furi_assert(bitstream_buff_start);
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for(size_t i = 0; i < instance->buffer_size * 4; i++) {
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if((i % 8) == 0) {
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bitstream_buff_start[i / 8] = 0;
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}
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uint8_t bit = 0;
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if(instance->polarity == SignalReaderPolarityNormal) {
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bit = (gpio_buff_start[i] & instance->pin->pin) == instance->pin->pin;
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} else {
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bit = (gpio_buff_start[i] & instance->pin->pin) == 0;
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}
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bitstream_buff_start[i / 8] |= bit << (i % 8);
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}
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instance->event_data.data = bitstream_buff_start;
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instance->event_data.len = instance->buffer_size / 2;
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instance->callback(instance->event, instance->context);
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}
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}
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if(LL_DMA_IsActiveFlag_TC2(SIGNAL_READER_DMA)) {
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LL_DMA_ClearFlag_TC2(SIGNAL_READER_DMA);
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instance->event.type = SignalReaderEventTypeFullBufferFilled;
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gpio_buff_start = &instance->gpio_buffer[instance->buffer_size * 4];
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bitstream_buff_start = &instance->bitstream_buffer[instance->buffer_size / 2];
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if(instance->callback) {
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furi_assert(gpio_buff_start);
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furi_assert(bitstream_buff_start);
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for(size_t i = 0; i < instance->buffer_size * 4; i++) {
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if((i % 8) == 0) {
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bitstream_buff_start[i / 8] = 0;
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}
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uint8_t bit = 0;
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if(instance->polarity == SignalReaderPolarityNormal) {
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bit = (gpio_buff_start[i] & instance->pin->pin) == instance->pin->pin;
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} else {
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bit = (gpio_buff_start[i] & instance->pin->pin) == 0;
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}
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bitstream_buff_start[i / 8] |= bit << (i % 8);
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}
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instance->event_data.data = bitstream_buff_start;
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instance->event_data.len = instance->buffer_size / 2;
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instance->callback(instance->event, instance->context);
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}
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}
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}
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void signal_reader_start(SignalReader* instance, SignalReaderCallback callback, void* context) {
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furi_assert(instance);
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furi_assert(callback);
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instance->callback = callback;
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instance->context = context;
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// EXTI delay compensation
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instance->tim_cnt_compensation = 9;
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instance->cnt_en = SIGNAL_READER_CAPTURE_TIM->CR1;
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instance->cnt_en |= TIM_CR1_CEN;
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furi_hal_bus_enable(FuriHalBusTIM16);
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// Capture timer config
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LL_TIM_SetPrescaler(SIGNAL_READER_CAPTURE_TIM, 0);
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LL_TIM_SetCounterMode(SIGNAL_READER_CAPTURE_TIM, LL_TIM_COUNTERMODE_UP);
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LL_TIM_SetAutoReload(SIGNAL_READER_CAPTURE_TIM, instance->tim_arr);
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LL_TIM_SetClockDivision(SIGNAL_READER_CAPTURE_TIM, LL_TIM_CLOCKDIVISION_DIV1);
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LL_TIM_DisableARRPreload(SIGNAL_READER_CAPTURE_TIM);
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LL_TIM_SetClockSource(SIGNAL_READER_CAPTURE_TIM, LL_TIM_CLOCKSOURCE_INTERNAL);
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// Configure TIM channel CC1
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LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {};
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TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_FROZEN;
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TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
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TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
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TIM_OC_InitStruct.CompareValue = (instance->tim_arr / 2);
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TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
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LL_TIM_OC_Init(
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SIGNAL_READER_CAPTURE_TIM, SIGNAL_READER_CAPTURE_TIM_CHANNEL, &TIM_OC_InitStruct);
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LL_TIM_OC_DisableFast(SIGNAL_READER_CAPTURE_TIM, SIGNAL_READER_CAPTURE_TIM_CHANNEL);
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LL_TIM_SetTriggerOutput(SIGNAL_READER_CAPTURE_TIM, LL_TIM_TRGO_RESET);
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LL_TIM_DisableMasterSlaveMode(SIGNAL_READER_CAPTURE_TIM);
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// Start
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LL_TIM_GenerateEvent_UPDATE(SIGNAL_READER_CAPTURE_TIM);
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/* We need the EXTI to be configured as interrupt generating line, but no ISR registered */
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furi_hal_gpio_init(
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instance->pin, GpioModeInterruptRiseFall, instance->pull, GpioSpeedVeryHigh);
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/* Set DMAMUX request generation signal ID on specified DMAMUX channel */
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LL_DMAMUX_SetRequestSignalID(
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DMAMUX1, LL_DMAMUX_REQ_GEN_0, GET_DMAMUX_EXTI_LINE(instance->pin->pin));
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/* Set the polarity of the signal on which the DMA request is generated */
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LL_DMAMUX_SetRequestGenPolarity(DMAMUX1, LL_DMAMUX_REQ_GEN_0, LL_DMAMUX_REQ_GEN_POL_RISING);
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/* Set the number of DMA requests that will be authorized after a generation event */
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LL_DMAMUX_SetGenRequestNb(DMAMUX1, LL_DMAMUX_REQ_GEN_0, 1);
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// Configure DMA Sync
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LL_DMA_SetMemoryAddress(
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SIGNAL_READER_DMA_CNT_SYNC_DEF, (uint32_t)&instance->tim_cnt_compensation);
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LL_DMA_SetPeriphAddress(
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SIGNAL_READER_DMA_CNT_SYNC_DEF, (uint32_t) & (SIGNAL_READER_CAPTURE_TIM->CNT));
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LL_DMA_ConfigTransfer(
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SIGNAL_READER_DMA_CNT_SYNC_DEF,
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LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
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LL_DMA_MEMORY_NOINCREMENT | LL_DMA_PDATAALIGN_HALFWORD | LL_DMA_MDATAALIGN_HALFWORD |
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LL_DMA_PRIORITY_VERYHIGH);
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LL_DMA_SetDataLength(SIGNAL_READER_DMA_CNT_SYNC_DEF, 1);
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LL_DMA_SetPeriphRequest(SIGNAL_READER_DMA_CNT_SYNC_DEF, LL_DMAMUX_REQ_GENERATOR0);
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// Configure DMA Sync
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LL_DMA_SetMemoryAddress(SIGNAL_READER_DMA_TRIGGER_DEF, (uint32_t)&instance->cnt_en);
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LL_DMA_SetPeriphAddress(
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SIGNAL_READER_DMA_TRIGGER_DEF, (uint32_t) & (SIGNAL_READER_CAPTURE_TIM->CR1));
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LL_DMA_ConfigTransfer(
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SIGNAL_READER_DMA_TRIGGER_DEF,
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LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_PERIPH_NOINCREMENT | LL_DMA_MEMORY_NOINCREMENT |
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LL_DMA_PDATAALIGN_HALFWORD | LL_DMA_MDATAALIGN_HALFWORD | LL_DMA_PRIORITY_VERYHIGH);
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LL_DMA_SetDataLength(SIGNAL_READER_DMA_TRIGGER_DEF, 1);
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LL_DMA_SetPeriphRequest(SIGNAL_READER_DMA_TRIGGER_DEF, LL_DMAMUX_REQ_GENERATOR0);
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// Configure DMA Rx pin
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LL_DMA_SetMemoryAddress(SIGNAL_READER_DMA_GPIO_DEF, (uint32_t)instance->gpio_buffer);
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LL_DMA_SetPeriphAddress(SIGNAL_READER_DMA_GPIO_DEF, (uint32_t) & (instance->pin->port->IDR));
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LL_DMA_ConfigTransfer(
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SIGNAL_READER_DMA_GPIO_DEF,
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LL_DMA_DIRECTION_PERIPH_TO_MEMORY | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
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LL_DMA_MEMORY_INCREMENT | LL_DMA_PDATAALIGN_HALFWORD | LL_DMA_MDATAALIGN_HALFWORD |
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LL_DMA_PRIORITY_HIGH);
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LL_DMA_SetDataLength(SIGNAL_READER_DMA_GPIO_DEF, instance->buffer_size * 8);
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LL_DMA_SetPeriphRequest(SIGNAL_READER_DMA_GPIO_DEF, LL_DMAMUX_REQ_TIM16_CH1);
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// Configure DMA Channel CC1
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LL_TIM_EnableDMAReq_CC1(SIGNAL_READER_CAPTURE_TIM);
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LL_TIM_CC_EnableChannel(SIGNAL_READER_CAPTURE_TIM, SIGNAL_READER_CAPTURE_TIM_CHANNEL);
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// Start DMA irq, higher priority than normal
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furi_hal_interrupt_set_isr_ex(
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SIGNAL_READER_DMA_GPIO_IRQ, 14, furi_hal_sw_digital_pin_dma_rx_isr, instance);
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// Start DMA Sync timer
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LL_DMA_EnableChannel(SIGNAL_READER_DMA_CNT_SYNC_DEF);
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// Start DMA Rx pin
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LL_DMA_EnableChannel(SIGNAL_READER_DMA_GPIO_DEF);
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// Strat timer
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LL_TIM_SetCounter(SIGNAL_READER_CAPTURE_TIM, 0);
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if(instance->trigger == SignalReaderTriggerNone) {
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LL_TIM_EnableCounter(SIGNAL_READER_CAPTURE_TIM);
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} else {
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LL_DMA_EnableChannel(SIGNAL_READER_DMA_TRIGGER_DEF);
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}
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LL_DMAMUX_EnableRequestGen(DMAMUX1, LL_DMAMUX_REQ_GEN_0);
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// Need to clear flags before enabling DMA !!!!
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if(LL_DMA_IsActiveFlag_TC2(SIGNAL_READER_DMA)) LL_DMA_ClearFlag_TC1(SIGNAL_READER_DMA);
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if(LL_DMA_IsActiveFlag_TE2(SIGNAL_READER_DMA)) LL_DMA_ClearFlag_TE1(SIGNAL_READER_DMA);
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LL_DMA_EnableIT_TC(SIGNAL_READER_DMA_GPIO_DEF);
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LL_DMA_EnableIT_HT(SIGNAL_READER_DMA_GPIO_DEF);
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}
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void signal_reader_stop(SignalReader* instance) {
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furi_assert(instance);
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furi_hal_interrupt_set_isr(SIGNAL_READER_DMA_GPIO_IRQ, NULL, NULL);
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// Deinit DMA Rx pin
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LL_DMA_DeInit(SIGNAL_READER_DMA_GPIO_DEF);
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// Deinit DMA Sync timer
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LL_DMA_DeInit(SIGNAL_READER_DMA_CNT_SYNC_DEF);
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// Deinit DMA Trigger timer
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LL_DMA_DeInit(SIGNAL_READER_DMA_TRIGGER_DEF);
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furi_hal_bus_disable(FuriHalBusTIM16);
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}
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