* gpio, hsem, crypto: switch from HAL to LL/registers * Moved GPIO initialization to furi_hal * More HAL removed * All HAL modules disabled * HAL is finally removed * hal_gpio -> furi_hal_gpio, main.h removed * Bootloader build fix * RTOS config moved to freertos-glue * delay -> furi_hal_delay Co-authored-by: あく <alleteam@gmail.com>
		
			
				
	
	
		
			288 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			288 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
#pragma once
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#include "stdbool.h"
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#include <stm32wbxx_ll_gpio.h>
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#include <stm32wbxx_ll_system.h>
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#include <stm32wbxx_ll_exti.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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 * Number of gpio on one port
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 */
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#define GPIO_NUMBER (16U)
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/**
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 * Interrupt callback prototype
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 */
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typedef void (*GpioExtiCallback)(void* ctx);
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/**
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 * Gpio interrupt type
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 */
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typedef struct {
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    GpioExtiCallback callback;
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    void* context;
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    volatile bool ready;
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} GpioInterrupt;
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/**
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 * Gpio modes
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 */
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typedef enum {
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    GpioModeInput,
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    GpioModeOutputPushPull,
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    GpioModeOutputOpenDrain,
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    GpioModeAltFunctionPushPull,
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    GpioModeAltFunctionOpenDrain,
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    GpioModeAnalog,
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    GpioModeInterruptRise,
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    GpioModeInterruptFall,
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    GpioModeInterruptRiseFall,
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    GpioModeEventRise,
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    GpioModeEventFall,
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    GpioModeEventRiseFall,
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} GpioMode;
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/**
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 * Gpio pull modes
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 */
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typedef enum {
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    GpioPullNo,
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    GpioPullUp,
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    GpioPullDown,
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} GpioPull;
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/**
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 * Gpio speed modes
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 */
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typedef enum {
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    GpioSpeedLow,
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    GpioSpeedMedium,
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    GpioSpeedHigh,
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    GpioSpeedVeryHigh,
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} GpioSpeed;
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/**
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 * Gpio alternate functions
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 */
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typedef enum {
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    GpioAltFn0MCO = 0, /*!< MCO Alternate Function mapping */
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    GpioAltFn0LSCO = 0, /*!< LSCO Alternate Function mapping */
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    GpioAltFn0JTMS_SWDIO = 0, /*!< JTMS-SWDIO Alternate Function mapping */
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    GpioAltFn0JTCK_SWCLK = 0, /*!< JTCK-SWCLK Alternate Function mapping */
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    GpioAltFn0JTDI = 0, /*!< JTDI Alternate Function mapping */
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    GpioAltFn0RTC_OUT = 0, /*!< RCT_OUT Alternate Function mapping */
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    GpioAltFn0JTD_TRACE = 0, /*!< JTDO-TRACESWO Alternate Function mapping */
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    GpioAltFn0NJTRST = 0, /*!< NJTRST Alternate Function mapping */
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    GpioAltFn0RTC_REFIN = 0, /*!< RTC_REFIN Alternate Function mapping */
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    GpioAltFn0TRACED0 = 0, /*!< TRACED0 Alternate Function mapping */
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    GpioAltFn0TRACED1 = 0, /*!< TRACED1 Alternate Function mapping */
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    GpioAltFn0TRACED2 = 0, /*!< TRACED2 Alternate Function mapping */
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    GpioAltFn0TRACED3 = 0, /*!< TRACED3 Alternate Function mapping */
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    GpioAltFn0TRIG_INOUT = 0, /*!< TRIG_INOUT Alternate Function mapping */
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    GpioAltFn0TRACECK = 0, /*!< TRACECK Alternate Function mapping */
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    GpioAltFn0SYS = 0, /*!< System Function mapping */
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    GpioAltFn1TIM1 = 1, /*!< TIM1 Alternate Function mapping */
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    GpioAltFn1TIM2 = 1, /*!< TIM2 Alternate Function mapping */
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    GpioAltFn1LPTIM1 = 1, /*!< LPTIM1 Alternate Function mapping */
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    GpioAltFn2TIM2 = 2, /*!< TIM2 Alternate Function mapping */
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    GpioAltFn2TIM1 = 2, /*!< TIM1 Alternate Function mapping */
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    GpioAltFn3SAI1 = 3, /*!< SAI1_CK1 Alternate Function mapping */
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    GpioAltFn3SPI2 = 3, /*!< SPI2 Alternate Function mapping */
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    GpioAltFn3TIM1 = 3, /*!< TIM1 Alternate Function mapping */
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    GpioAltFn4I2C1 = 4, /*!< I2C1 Alternate Function mapping */
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    GpioAltFn4I2C3 = 4, /*!< I2C3 Alternate Function mapping */
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    GpioAltFn5SPI1 = 5, /*!< SPI1 Alternate Function mapping */
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    GpioAltFn5SPI2 = 5, /*!< SPI2 Alternate Function mapping */
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    GpioAltFn6MCO = 6, /*!< MCO Alternate Function mapping */
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    GpioAltFn6LSCO = 6, /*!< LSCO Alternate Function mapping */
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    GpioAltFn6RF_DTB0 = 6, /*!< RF_DTB0 Alternate Function mapping */
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    GpioAltFn6RF_DTB1 = 6, /*!< RF_DTB1 Alternate Function mapping */
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    GpioAltFn6RF_DTB2 = 6, /*!< RF_DTB2 Alternate Function mapping */
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    GpioAltFn6RF_DTB3 = 6, /*!< RF_DTB3 Alternate Function mapping */
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    GpioAltFn6RF_DTB4 = 6, /*!< RF_DTB4 Alternate Function mapping */
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    GpioAltFn6RF_DTB5 = 6, /*!< RF_DTB5 Alternate Function mapping */
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    GpioAltFn6RF_DTB6 = 6, /*!< RF_DTB6 Alternate Function mapping */
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    GpioAltFn6RF_DTB7 = 6, /*!< RF_DTB7 Alternate Function mapping */
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    GpioAltFn6RF_DTB8 = 6, /*!< RF_DTB8 Alternate Function mapping */
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    GpioAltFn6RF_DTB9 = 6, /*!< RF_DTB9 Alternate Function mapping */
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    GpioAltFn6RF_DTB10 = 6, /*!< RF_DTB10 Alternate Function mapping */
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    GpioAltFn6RF_DTB11 = 6, /*!< RF_DTB11 Alternate Function mapping */
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    GpioAltFn6RF_DTB12 = 6, /*!< RF_DTB12 Alternate Function mapping */
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    GpioAltFn6RF_DTB13 = 6, /*!< RF_DTB13 Alternate Function mapping */
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    GpioAltFn6RF_DTB14 = 6, /*!< RF_DTB14 Alternate Function mapping */
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    GpioAltFn6RF_DTB15 = 6, /*!< RF_DTB15 Alternate Function mapping */
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    GpioAltFn6RF_DTB16 = 6, /*!< RF_DTB16 Alternate Function mapping */
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    GpioAltFn6RF_DTB17 = 6, /*!< RF_DTB17 Alternate Function mapping */
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    GpioAltFn6RF_DTB18 = 6, /*!< RF_DTB18 Alternate Function mapping */
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    GpioAltFn6RF_MISO = 6, /*!< RF_MISO Alternate Function mapping */
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    GpioAltFn6RF_MOSI = 6, /*!< RF_MOSI Alternate Function mapping */
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    GpioAltFn6RF_SCK = 6, /*!< RF_SCK Alternate Function mapping */
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    GpioAltFn6RF_NSS = 6, /*!< RF_NSS Alternate Function mapping */
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    GpioAltFn7USART1 = 7, /*!< USART1 Alternate Function mapping */
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    GpioAltFn8LPUART1 = 8, /*!< LPUART1 Alternate Function mapping */
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    GpioAltFn8IR = 8, /*!< IR Alternate Function mapping */
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    GpioAltFn9TSC = 9, /*!< TSC Alternate Function mapping */
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    GpioAltFn10QUADSPI = 10, /*!< QUADSPI Alternate Function mapping */
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    GpioAltFn10USB = 10, /*!< USB Alternate Function mapping */
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    GpioAltFn11LCD = 11, /*!< LCD Alternate Function mapping */
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    GpioAltFn12COMP1 = 12, /*!< COMP1 Alternate Function mapping */
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    GpioAltFn12COMP2 = 12, /*!< COMP2 Alternate Function mapping */
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    GpioAltFn12TIM1 = 12, /*!< TIM1 Alternate Function mapping */
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    GpioAltFn13SAI1 = 13, /*!< SAI1 Alternate Function mapping */
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    GpioAltFn14TIM2 = 14, /*!< TIM2 Alternate Function mapping */
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    GpioAltFn14TIM16 = 14, /*!< TIM16 Alternate Function mapping */
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    GpioAltFn14TIM17 = 14, /*!< TIM17 Alternate Function mapping */
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    GpioAltFn14LPTIM2 = 14, /*!< LPTIM2 Alternate Function mapping */
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    GpioAltFn15EVENTOUT = 15, /*!< EVENTOUT Alternate Function mapping */
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    GpioAltFnUnused = 16, /*!< just dummy value */
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} GpioAltFn;
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/**
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 * Gpio structure
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 */
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typedef struct {
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    GPIO_TypeDef* port;
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    uint16_t pin;
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} GpioPin;
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/**
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 * GPIO initialization function, simple version
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 * @param gpio  GpioPin
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 * @param mode  GpioMode
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 */
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void furi_hal_gpio_init_simple(const GpioPin* gpio, const GpioMode mode);
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/**
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 * GPIO initialization function, normal version
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 * @param gpio  GpioPin
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 * @param mode  GpioMode
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 * @param pull  GpioPull
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 * @param speed GpioSpeed
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 */
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void furi_hal_gpio_init(
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    const GpioPin* gpio,
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    const GpioMode mode,
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    const GpioPull pull,
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    const GpioSpeed speed);
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/**
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 * GPIO initialization function, extended version
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 * @param gpio  GpioPin
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 * @param mode  GpioMode
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 * @param pull  GpioPull
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 * @param speed GpioSpeed
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 * @param alt_fn GpioAltFn
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 */
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void furi_hal_gpio_init_ex(
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    const GpioPin* gpio,
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    const GpioMode mode,
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    const GpioPull pull,
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    const GpioSpeed speed,
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    const GpioAltFn alt_fn);
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/**
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 * Add and enable interrupt
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 * @param gpio GpioPin
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 * @param cb   GpioExtiCallback
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 * @param ctx  context for callback
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 */
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void furi_hal_gpio_add_int_callback(const GpioPin* gpio, GpioExtiCallback cb, void* ctx);
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/**
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 * Enable interrupt
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 * @param gpio GpioPin
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 */
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void furi_hal_gpio_enable_int_callback(const GpioPin* gpio);
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/**
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 * Disable interrupt
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 * @param gpio GpioPin
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 */
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void furi_hal_gpio_disable_int_callback(const GpioPin* gpio);
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/**
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 * Remove interrupt
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 * @param gpio GpioPin
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 */
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void furi_hal_gpio_remove_int_callback(const GpioPin* gpio);
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/**
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 * GPIO write pin
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 * @param gpio  GpioPin
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 * @param state true / false
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 */
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static inline void furi_hal_gpio_write(const GpioPin* gpio, const bool state) {
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    // writing to BSSR is an atomic operation
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    if(state == true) {
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        gpio->port->BSRR = gpio->pin;
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    } else {
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        gpio->port->BSRR = (uint32_t)gpio->pin << GPIO_NUMBER;
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    }
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}
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/**
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 * GPIO read pin
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 * @param port GPIO port
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 * @param pin pin mask
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 * @return true / false
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 */
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static inline void
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    furi_hal_gpio_write_port_pin(GPIO_TypeDef* port, uint16_t pin, const bool state) {
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    // writing to BSSR is an atomic operation
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    if(state == true) {
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        port->BSRR = pin;
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    } else {
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        port->BSRR = pin << GPIO_NUMBER;
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    }
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}
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/**
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 * GPIO read pin
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 * @param gpio GpioPin
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 * @return true / false
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 */
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static inline bool furi_hal_gpio_read(const GpioPin* gpio) {
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    if((gpio->port->IDR & gpio->pin) != 0x00U) {
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        return true;
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    } else {
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        return false;
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    }
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}
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/**
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 * GPIO read pin
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 * @param port GPIO port
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 * @param pin pin mask
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 * @return true / false
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 */
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static inline bool furi_hal_gpio_read_port_pin(GPIO_TypeDef* port, uint16_t pin) {
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    if((port->IDR & pin) != 0x00U) {
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        return true;
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    } else {
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        return false;
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    }
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}
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#ifdef __cplusplus
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}
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#endif
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