 0e1922db4d
			
		
	
	
		0e1922db4d
		
			
		
	
	
	
	
		
			
			* bt: stop advertising in bt test cli commands * furi-hal-bt: add switch context in furi_hal_bt_lock_flash * Lib: update STM32CubeWB to latest version. Scripts: update supported copro binaries version * Scripts: proper version extraction from Cube manifest * bt: add debug application and comment it * bt: fix stop advertising command * bt: debug on f7 target * furi-hal-console: add console tx + new line * bt: fix debug trace function Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com>
		
			
				
	
	
		
			375 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			375 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* USER CODE BEGIN Header */
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| /**
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|  ******************************************************************************
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|   * File Name          : app_debug.c
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|   * Description        : Debug capabilities source file for STM32WPAN Middleware
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|  ******************************************************************************
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|   * @attention
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|   *
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|   * <h2><center>© Copyright (c) 2020 STMicroelectronics.
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|   * All rights reserved.</center></h2>
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|   *
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|   * This software component is licensed by ST under Ultimate Liberty license
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|   * SLA0044, the "License"; You may not use this file except in compliance with
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|   * the License. You may obtain a copy of the License at:
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|   *                             www.st.com/SLA0044
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|   *
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|  ******************************************************************************
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|  */
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| /* USER CODE END Header */
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| 
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| /* Includes ------------------------------------------------------------------*/
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| /* USER CODE BEGIN Includes */
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| #include "utilities_common.h"
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| 
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| #include "app_common.h"
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| #include "app_debug.h"
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| #include "shci.h"
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| #include "tl.h"
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| #include "dbg_trace.h"
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| #include <furi-hal.h>
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| /* USER CODE END Includes */
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| 
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| /* Private typedef -----------------------------------------------------------*/
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| /* USER CODE BEGIN PTD */
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| typedef PACKED_STRUCT
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| {
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|   GPIO_TypeDef* port;
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|   uint16_t pin;
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|   uint8_t enable;
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|   uint8_t reserved;
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| } APPD_GpioConfig_t;
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| /* USER CODE END PTD */
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| 
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| /* Private defines -----------------------------------------------------------*/
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| /* USER CODE BEGIN PD */
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| #define GPIO_NBR_OF_RF_SIGNALS                  9
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| #define GPIO_CFG_NBR_OF_FEATURES                34
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| #define NBR_OF_TRACES_CONFIG_PARAMETERS         4
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| #define NBR_OF_GENERAL_CONFIG_PARAMETERS        4
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| 
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| /**
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|  * THIS SHALL BE SET TO A VALUE DIFFERENT FROM 0 ONLY ON REQUEST FROM ST SUPPORT
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|  */
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| #define BLE_DTB_CFG     7
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| #define SYS_DBG_CFG1  (SHCI_C2_DEBUG_OPTIONS_IPCORE_LP | SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_EN) 
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| /* USER CODE END PD */
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| 
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| /* Private variables ---------------------------------------------------------*/
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| /* USER CODE BEGIN PV */
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| PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static SHCI_C2_DEBUG_TracesConfig_t APPD_TracesConfig={0, 0, 0, 0};
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| PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static SHCI_C2_DEBUG_GeneralConfig_t APPD_GeneralConfig={BLE_DTB_CFG, SYS_DBG_CFG1, {0, 0}};
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| 
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| /**
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|  * THE DEBUG ON GPIO FOR CPU2 IS INTENDED TO BE USED ONLY ON REQUEST FROM ST SUPPORT
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|  * It provides timing information on the CPU2 activity.
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|  * All configuration of (port, pin) is supported for each features and can be selected by the user
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|  * depending on the availability
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|  */
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| static const APPD_GpioConfig_t aGpioConfigList[GPIO_CFG_NBR_OF_FEATURES] =
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| {
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_ISR - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_7, 1, 0},  /* BLE_STACK_TICK - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_CMD_PROCESS - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_ACL_DATA_PROCESS - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* SYS_CMD_PROCESS - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* RNG_PROCESS - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVM_PROCESS - Set on Entry / Reset on Exit */
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|     { GPIOB, LL_GPIO_PIN_3, 1, 0},  /* IPCC_GENERAL - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_CMD_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_EVT_TX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_ACL_DATA_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_SYS_CMD_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_SYS_EVT_TX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_CLI_CMD_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_OT_CMD_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_OT_ACK_TX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_CLI_ACK_TX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_MEM_MANAGER_RX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_TRACES_TX - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_6, 1, 0},  /* HARD_FAULT - Set on Entry / Reset on Exit */
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| /* From v1.1.1 */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IP_CORE_LP_STATUS - Set on Entry / Reset on Exit */
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| /* From v1.2.0 */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* END_OF_CONNECTION_EVENT - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* TIMER_SERVER_CALLBACK - Toggle on Entry */
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|     { GPIOA, LL_GPIO_PIN_4, 1, 0},  /* PES_ACTIVITY - Set on Entry / Reset on Exit */
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|     { GPIOB, LL_GPIO_PIN_2, 1, 0},  /* MB_BLE_SEND_EVT - Set on Entry / Reset on Exit */
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| /* From v1.3.0 */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_NO_DELAY - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_STACK_STORE_NVM_CB - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_WRITE_ONGOING - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_WRITE_COMPLETE - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_CLEANUP - Set on Entry / Reset on Exit */
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| /* From v1.4.0 */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_START - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_EOP - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_WRITE - Set on Entry / Reset on Exit */
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|     { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_ERASE - Set on Entry / Reset on Exit */
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| };
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| 
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| /**
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|  * THE DEBUG ON GPIO FOR CPU2 IS INTENDED TO BE USED ONLY ON REQUEST FROM ST SUPPORT
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|  * This table is relevant only for BLE
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|  * It provides timing information on BLE RF activity.
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|  * New signals may be allocated at any location when requested by ST
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|  * The GPIO allocated to each signal depend on the BLE_DTB_CFG value and cannot be changed
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|  */
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| #if( BLE_DTB_CFG == 7)
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| static const APPD_GpioConfig_t aRfConfigList[GPIO_NBR_OF_RF_SIGNALS] =
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| {
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|     { GPIOB, LL_GPIO_PIN_2, 0, 0},      /* DTB10 - Tx/Rx SPI */
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|     { GPIOB, LL_GPIO_PIN_7, 0, 0},      /* DTB11 - Tx/Tx SPI Clk */
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|     { GPIOA, LL_GPIO_PIN_8, 0, 0},      /* DTB12 - Tx/Rx Ready & SPI Select */
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|     { GPIOA, LL_GPIO_PIN_9, 0, 0},      /* DTB13 - Tx/Rx Start */
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|     { GPIOA, LL_GPIO_PIN_10, 0, 0},     /* DTB14 - FSM0 */
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|     { GPIOA, LL_GPIO_PIN_11, 0, 0},     /* DTB15 - FSM1 */
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|     { GPIOB, LL_GPIO_PIN_8, 0, 0},      /* DTB16 - FSM2 */
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|     { GPIOB, LL_GPIO_PIN_11, 0, 0},     /* DTB17 - FSM3 */
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|     { GPIOB, LL_GPIO_PIN_10, 0, 0},     /* DTB18 - FSM4 */
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| };
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| #endif
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| /* USER CODE END PV */
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| 
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| /* Global variables ----------------------------------------------------------*/
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| /* USER CODE BEGIN GV */
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| /* USER CODE END GV */
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| 
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| /* Private function prototypes -----------------------------------------------*/
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| /* USER CODE BEGIN PFP */
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| static void APPD_SetCPU2GpioConfig( void );
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| static void APPD_BleDtbCfg( void );
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| /* USER CODE END PFP */
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| 
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| /* Functions Definition ------------------------------------------------------*/
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| void APPD_Init( void )
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| {
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| /* USER CODE BEGIN APPD_Init */
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| #if (CFG_DEBUGGER_SUPPORTED == 1)
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|   /**
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|    * Keep debugger enabled while in any low power mode
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|    */
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|   HAL_DBGMCU_EnableDBGSleepMode();
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|   HAL_DBGMCU_EnableDBGStopMode();
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| 
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|   /***************** ENABLE DEBUGGER *************************************/
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|   LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
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| 
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| #else
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|   GPIO_InitTypeDef gpio_config = {0};
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| 
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|   gpio_config.Pull = GPIO_NOPULL;
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|   gpio_config.Mode = GPIO_MODE_ANALOG;
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| 
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|   gpio_config.Pin = GPIO_PIN_15 | GPIO_PIN_14 | GPIO_PIN_13;
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|   __HAL_RCC_GPIOA_CLK_ENABLE();
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|   HAL_GPIO_Init(GPIOA, &gpio_config);
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|   __HAL_RCC_GPIOA_CLK_DISABLE();
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| 
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|   gpio_config.Pin = GPIO_PIN_4 | GPIO_PIN_3;
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|   __HAL_RCC_GPIOB_CLK_ENABLE();
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|   HAL_GPIO_Init(GPIOB, &gpio_config);
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|   __HAL_RCC_GPIOB_CLK_DISABLE();
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| 
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|   HAL_DBGMCU_DisableDBGSleepMode();
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|   HAL_DBGMCU_DisableDBGStopMode();
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|   HAL_DBGMCU_DisableDBGStandbyMode();
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| 
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| #endif /* (CFG_DEBUGGER_SUPPORTED == 1) */
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| 
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| #if(CFG_DEBUG_TRACE != 0)
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|   DbgTraceInit();
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| #endif
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| 
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|   APPD_SetCPU2GpioConfig( );
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|   APPD_BleDtbCfg( );
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| 
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| /* USER CODE END APPD_Init */
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|   return;
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| }
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| 
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| void APPD_EnableCPU2( void )
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| {
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| /* USER CODE BEGIN APPD_EnableCPU2 */
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|   SHCI_C2_DEBUG_Init_Cmd_Packet_t DebugCmdPacket =
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|   {
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|     {{0,0,0}},                            /**< Does not need to be initialized */
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|     {(uint8_t *)aGpioConfigList,
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|     (uint8_t *)&APPD_TracesConfig,
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|     (uint8_t *)&APPD_GeneralConfig,
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|     GPIO_CFG_NBR_OF_FEATURES,
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|     NBR_OF_TRACES_CONFIG_PARAMETERS,
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|     NBR_OF_GENERAL_CONFIG_PARAMETERS}
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|   };
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| 
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|   /**< Traces channel initialization */
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|   TL_TRACES_Init( );
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| 
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|   /** GPIO DEBUG Initialization */
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|   SHCI_C2_DEBUG_Init( &DebugCmdPacket  );
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| 
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|   // GPIO_InitTypeDef  GPIO_InitStruct;
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|   // GPIO_InitStruct.Pull = GPIO_NOPULL;
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|   // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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|   // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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|   // GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
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|   // HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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|   // SHCI_C2_ExtpaConfig((uint32_t)GPIOC, LL_GPIO_PIN_3, EXT_PA_ENABLED_LOW, EXT_PA_ENABLED);
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| 
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| /* USER CODE END APPD_EnableCPU2 */
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|   return;
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| }
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| 
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| /*************************************************************
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|  *
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|  * LOCAL FUNCTIONS
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|  *
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|  *************************************************************/
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| static void APPD_SetCPU2GpioConfig( void )
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| {
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| /* USER CODE BEGIN APPD_SetCPU2GpioConfig */
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|   GPIO_InitTypeDef gpio_config = {0};
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|   uint8_t local_loop;
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|   uint16_t gpioa_pin_list;
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|   uint16_t gpiob_pin_list;
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|   uint16_t gpioc_pin_list;
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| 
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|   gpioa_pin_list = 0;
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|   gpiob_pin_list = 0;
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|   gpioc_pin_list = 0;
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| 
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|   for(local_loop = 0 ; local_loop < GPIO_CFG_NBR_OF_FEATURES; local_loop++)
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|   {
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|     if( aGpioConfigList[local_loop].enable != 0)
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|     {
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|       switch((uint32_t)aGpioConfigList[local_loop].port)
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|       {
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|         case (uint32_t)GPIOA:
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|             gpioa_pin_list |= aGpioConfigList[local_loop].pin;
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|           break;
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| 
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|         case (uint32_t)GPIOB:
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|             gpiob_pin_list |= aGpioConfigList[local_loop].pin;
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|           break;
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| 
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|         case (uint32_t)GPIOC:
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|             gpioc_pin_list |= aGpioConfigList[local_loop].pin;
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|           break;
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| 
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|         default:
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|           break;
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|       }
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|     }
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|   }
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| 
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|   gpio_config.Pull = GPIO_NOPULL;
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|   gpio_config.Mode = GPIO_MODE_OUTPUT_PP;
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|   gpio_config.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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| 
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|   if(gpioa_pin_list != 0)
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|   {
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|     gpio_config.Pin = gpioa_pin_list;
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|     __HAL_RCC_GPIOA_CLK_ENABLE();
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|     __HAL_RCC_C2GPIOA_CLK_ENABLE();
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|     HAL_GPIO_Init(GPIOA, &gpio_config);
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|     HAL_GPIO_WritePin(GPIOA, gpioa_pin_list, GPIO_PIN_RESET);
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|   }
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| 
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|   if(gpiob_pin_list != 0)
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|   {
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|     gpio_config.Pin = gpiob_pin_list;
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|     __HAL_RCC_GPIOB_CLK_ENABLE();
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|     __HAL_RCC_C2GPIOB_CLK_ENABLE();
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|     HAL_GPIO_Init(GPIOB, &gpio_config);
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|     HAL_GPIO_WritePin(GPIOB, gpiob_pin_list, GPIO_PIN_RESET);
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|   }
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| 
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|   if(gpioc_pin_list != 0)
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|   {
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|     gpio_config.Pin = gpioc_pin_list;
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|     __HAL_RCC_GPIOC_CLK_ENABLE();
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|     __HAL_RCC_C2GPIOC_CLK_ENABLE();
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|     HAL_GPIO_Init(GPIOC, &gpio_config);
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|     HAL_GPIO_WritePin(GPIOC, gpioc_pin_list, GPIO_PIN_RESET);
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|   }
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| 
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| /* USER CODE END APPD_SetCPU2GpioConfig */
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|   return;
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| }
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| 
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| static void APPD_BleDtbCfg( void )
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| {
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| /* USER CODE BEGIN APPD_BleDtbCfg */
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| #if (BLE_DTB_CFG != 0)
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|   GPIO_InitTypeDef gpio_config = {0};
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|   uint8_t local_loop;
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|   uint16_t gpioa_pin_list;
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|   uint16_t gpiob_pin_list;
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| 
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|   gpioa_pin_list = 0;
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|   gpiob_pin_list = 0;
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| 
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|   for(local_loop = 0 ; local_loop < GPIO_NBR_OF_RF_SIGNALS; local_loop++)
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|   {
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|     if( aRfConfigList[local_loop].enable != 0)
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|     {
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|       switch((uint32_t)aRfConfigList[local_loop].port)
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|       {
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|         case (uint32_t)GPIOA:
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|             gpioa_pin_list |= aRfConfigList[local_loop].pin;
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|           break;
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| 
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|         case (uint32_t)GPIOB:
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|             gpiob_pin_list |= aRfConfigList[local_loop].pin;
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|           break;
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| 
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|         default:
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|           break;
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|       }
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|     }
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|   }
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| 
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|   gpio_config.Pull = GPIO_NOPULL;
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|   gpio_config.Mode = GPIO_MODE_AF_PP;
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|   gpio_config.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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|   gpio_config.Alternate = GPIO_AF6_RF_DTB7;
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| 
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|   if(gpioa_pin_list != 0)
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|   {
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|     gpio_config.Pin = gpioa_pin_list;
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|     __HAL_RCC_GPIOA_CLK_ENABLE();
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|     __HAL_RCC_C2GPIOA_CLK_ENABLE();
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|     HAL_GPIO_Init(GPIOA, &gpio_config);
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|   }
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| 
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|   if(gpiob_pin_list != 0)
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|   {
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|     gpio_config.Pin = gpiob_pin_list;
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|     __HAL_RCC_GPIOB_CLK_ENABLE();
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|     __HAL_RCC_C2GPIOB_CLK_ENABLE();
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|     HAL_GPIO_Init(GPIOB, &gpio_config);
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|   }
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| #endif
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| 
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| /* USER CODE END APPD_BleDtbCfg */
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|   return;
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| }
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| 
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| /*************************************************************
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|  *
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|  * WRAP FUNCTIONS
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|  *
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| *************************************************************/
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| #if(CFG_DEBUG_TRACE != 0)
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| void DbgOutputInit( void )
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| {
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| }
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| 
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| void DbgOutputTraces(  uint8_t *p_data, uint16_t size, void (*cb)(void) )
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| {
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|   furi_hal_console_tx(p_data, size);
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|   cb();
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| }
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| #endif
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| 
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| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |