62939dd28b
* Core2, SRAM2: use ob, provide safety gap * thread: comment about critical section and scheduler state
126 lines
3.5 KiB
C
126 lines
3.5 KiB
C
#include <furi_hal.h>
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#include <furi_hal_memory.h>
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#include <furi_hal_rtc.h>
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#define TAG "FuriHalMemory"
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// STM(TM) Copro(TM) bug(TM) workaround size
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#define RAM2B_COPRO_GAP_SIZE_KB 2
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typedef enum {
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SRAM_A,
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SRAM_B,
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SRAM_MAX,
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} SRAM;
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typedef struct {
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void* start;
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uint32_t size;
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} FuriHalMemoryRegion;
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typedef struct {
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FuriHalMemoryRegion region[SRAM_MAX];
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} FuriHalMemory;
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static FuriHalMemory* furi_hal_memory = NULL;
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extern const void __sram2a_start__;
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extern const void __sram2a_free__;
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extern const void __sram2b_start__;
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void furi_hal_memory_init() {
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if(furi_hal_rtc_get_boot_mode() != FuriHalRtcBootModeNormal) {
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return;
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}
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FuriHalMemory* memory = malloc(sizeof(FuriHalMemory));
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uint32_t sbrsa = (FLASH->SRRVR & FLASH_SRRVR_SBRSA_Msk) >> FLASH_SRRVR_SBRSA_Pos;
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uint32_t snbrsa = (FLASH->SRRVR & FLASH_SRRVR_SNBRSA_Msk) >> FLASH_SRRVR_SNBRSA_Pos;
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uint32_t sram2a_busy_size = (uint32_t)&__sram2a_free__ - (uint32_t)&__sram2a_start__;
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uint32_t sram2a_unprotected_size = (sbrsa)*1024;
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uint32_t sram2b_unprotected_size = (snbrsa)*1024;
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// STM(TM) Copro(TM) bug(TM) workaround
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sram2b_unprotected_size -= 1024 * RAM2B_COPRO_GAP_SIZE_KB;
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memory->region[SRAM_A].start = (uint8_t*)&__sram2a_free__;
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memory->region[SRAM_B].start = (uint8_t*)&__sram2b_start__;
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if(sram2a_unprotected_size > sram2a_busy_size) {
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memory->region[SRAM_A].size = sram2a_unprotected_size - sram2a_busy_size;
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} else {
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memory->region[SRAM_A].size = 0;
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}
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memory->region[SRAM_B].size = sram2b_unprotected_size;
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FURI_LOG_I(
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TAG, "SRAM2A: 0x%p, %lu", memory->region[SRAM_A].start, memory->region[SRAM_A].size);
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FURI_LOG_I(
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TAG, "SRAM2B: 0x%p, %lu", memory->region[SRAM_B].start, memory->region[SRAM_B].size);
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if((memory->region[SRAM_A].size > 0) || (memory->region[SRAM_B].size > 0)) {
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if((memory->region[SRAM_A].size > 0)) {
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FURI_LOG_I(TAG, "SRAM2A clear");
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memset(memory->region[SRAM_A].start, 0, memory->region[SRAM_A].size);
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}
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if((memory->region[SRAM_B].size > 0)) {
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FURI_LOG_I(TAG, "SRAM2B clear");
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memset(memory->region[SRAM_B].start, 0, memory->region[SRAM_B].size);
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}
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furi_hal_memory = memory;
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FURI_LOG_I(TAG, "Enabled");
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} else {
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free(memory);
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FURI_LOG_E(TAG, "No SRAM2 available");
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}
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}
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void* furi_hal_memory_alloc(size_t size) {
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if(FURI_IS_IRQ_MODE()) {
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furi_crash("memmgt in ISR");
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}
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if(furi_hal_memory == NULL) {
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return NULL;
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}
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void* allocated_memory = NULL;
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FURI_CRITICAL_ENTER();
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for(int i = 0; i < SRAM_MAX; i++) {
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if(furi_hal_memory->region[i].size >= size) {
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void* ptr = furi_hal_memory->region[i].start;
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furi_hal_memory->region[i].start += size;
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furi_hal_memory->region[i].size -= size;
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allocated_memory = ptr;
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break;
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}
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}
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FURI_CRITICAL_EXIT();
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return allocated_memory;
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}
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size_t furi_hal_memory_get_free() {
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if(furi_hal_memory == NULL) return 0;
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size_t free = 0;
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for(int i = 0; i < SRAM_MAX; i++) {
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free += furi_hal_memory->region[i].size;
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}
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return free;
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}
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size_t furi_hal_memory_max_pool_block() {
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if(furi_hal_memory == NULL) return 0;
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size_t max = 0;
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for(int i = 0; i < SRAM_MAX; i++) {
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if(furi_hal_memory->region[i].size > max) {
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max = furi_hal_memory->region[i].size;
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}
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}
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return max;
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}
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